EP0186854A2
Expired / Lapsed
EP
⏱️ 0.0 years remaining
Frequency synthesizer having means for suppressing frequency instability caused by intermittent PLL operation
Assignee: Fujitsu Ltd
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Filing: 1985-12-18
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Granted: —
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Expires: 2005-12-18
Abstract
Abstract Frequency instability in a frequency synthesizer having a PLL circuit (3, 4, 5, 6, 7) operated intermittently to save its power consumption has been avoided by providing a means to suppress such instability. The instability has been found to be caused by phase uncertainty between reference frequency (f r ) and output frequency (f out ) at a time when the PLL is switched on. Therefore, a means (S2, S3) to equalize the phase of both frequencies has been provided. The new frequency synthesizer is stable enough for application to a mobile transmission system.
Inventors
- 👤 Eiji Itaya
- 👤 Takeshi Takano
- 👤 Takaharu Nakamura
Bibliographic Details
Application Number
—
Jurisdiction
EP
Data Source
google_patents
Last Synchronized
2026-10-26 15:14
CPC Classifications
H; H03; H03L; H03L7/00; H03L7/06; H03L7/08; H03L7/081; H03L7/0802; H03L7/085; H03L7/087; H03L7/16; H03L7/18; H03L7/197; H03L7/199
Claims Analysis
Total Claims: 13
Claim 1
Independent Claim
242 words
A frequency synthesizer having a phase locked loop (PLL) for intermittent operation characterized by: a reference frequency generating means (2) for generating a reference frequency (f r ); a phase locked loop (PLL) circuit which comprises, a voltage controlled oscillator (5) for providing an output frequency (f out ); a frequency divider means (6,7) for dividing said output frequency by an integer and for providing a comp- arision frequency (f p ) which is close to said reference frequency (f r ); a phase comparator (3) for providing a difference signal corresponding to phase difference between the reference frequency (f r ) and comparison frequency ( fp ) ; a loop filter (4) for receiving said difference signal and for providing a control signal to control the output frequency of said VCO, a power switch (Sp) for switching on or off a power supply to said frequency divider means (6,7) for making it operate intermittently; a first switch (S2) provided between said reference frequency oscillator (2) and one input terminal of said phase comparator (3); a second switch (S3) provided between said frequency divider means (6,7) and another input terminal of said phase comparator (3); and means for controlling ON-OFF timing of said power switch (Sp), first and second switches (S2,S3) so that the phase of said reference frequency (f ) and comparison frequency (f ) are equalized between each other at a time when said power switch (Sp) is switched on.
Claim 2
Dependent Claim
242 words
A frequency synthesizer having a phase locked loop (PLL) for intermittent operation characterized by: a reference frequency generating means (2) for generating a reference frequency (f r ); a phase locked loop (PLL) circuit which comprises, a voltage controlled oscillator (5) for providing an output frequency (f out ); a frequency divider means (6,7) for dividing said output frequency by an integer and for providing a comp- arision frequency (f p ) which is close to said reference frequency (f r ); a phase comparator (3) for providing a difference signal corresponding to phase difference between the reference frequency (f r ) and comparison frequency ( fp ) ; a loop filter (4) for receiving said difference signal and for providing a control signal to control the output frequency of said VCO, a power switch (Sp) for switching on or off a power supply to said frequency divider means (6,7) for making it operate intermittently; a first switch (S2) provided between said reference frequency oscillator (2) and one input terminal of said phase comparator (3); a second switch (S3) provided between said frequency divider means (6,7) and another input terminal of said phase comparator (3); and means for controlling ON-OFF timing of said power switch (Sp), first and second switches (S2,S3) so that the phase of said reference frequency (f ) and comparison frequency (f ) are equalized between each other at a time when said power switch (Sp) is switched on.
Claim 3
Dependent Claim
40 words
A frequency synthesizer according to claim 1, wherein said first switch (S2) and second switch (S3) are switched on simultaneously after said power switch (Sp) is switched on, and simultaneously switched off before said power switch (Sp) is switched off.
Claim 4
Dependent Claim
53 words
A frequency synthesizer according to claim 1, wherein said reference frequency generating means (2) comprises: a crystal stabilized oscillator (1) generating a M multiple of the reference frequency (f r ), where M is an integer, and a 1/M frequency divider (2) dividing the output frequency of said crystal stabilized oscillator by M.
Claim 5
Dependent Claim
75 words
A frequency synthesizer according to any one of claims 1 to 3, wherein said frequency divider means comprises: a prescaler (6) for dividing the output frequency (f o ut) of said VCO (5) by an integer P, input power for said prescaler being switched on or off by said power switch (Sp); and a programmable frequency divider (7) for further dividing the output frequency of said prescaler (f N ) by a variable integer N.
Claim 6
Dependent Claim
167 words
A frequency synthesizer according to any one of claims 1 to 4, further comprising a second PLL circuit which comprises: a voltage controlled crystal oscillator means (1-1,2) for generating a reference frequency (fr); a second phase comparator (8), for providing a second difference signal corresponding to phase difference between the reference frequency (f r ) and said comparison frequency (fp); a second filter (9) being a low pass filter connected to receive the second difference signal and to provide a voltage corresponding to the phase difference between the reference frequency (f ) and said comparison frequency (fp); an operational amplifier (10) for amplifying said output voltage of second loop filter, and feeding it back to the voltage controlled crystal oscillator means (1-1); a third switch (S4) inserted between said voltage controlled crystal oscillator means (1-1) and one input terminal of said second phase comparator (8); and a fourth switch (S5) inserted between another input terminal of said second phase comparator (8) and said frequency divider means (6,7).
Claim 7
Dependent Claim
82 words
A frequency synthesizer according to claim 5, wherein: said third and fourth switches (S4 and S5) are controllable for simultaneous switch on after the power switch (Sp) is switched on, and simultaneously switch off while the power switch (Sp) is switched on; and said first and second switches (S2 and S3) are controlled for simultaneous switch on at the same time that the third and fourth switches are switched off, and simultaneous switch off while the power switch (Sp) is switched on.
Claim 8
Dependent Claim
57 words
A frequency synthesizer according to claim 5, wherein said voltage controlled crystal oscillator means comprises: a voltage controlled crystal oscillator (1-1), for generating an M multiple of the reference frequency (f r ), where M is an integer, and a 1/M frequency divider (2) for dividing the output frequency of said voltage controlled crystal oscillator by M.
Claim 9
Dependent Claim
166 words
A frequency synthesizer according to any one of claims 1 to 4, further comprising a second PLL circuit which comprises: a voltage controlled crystal oscillator means (1-1,2) generating a reference frequency (fr); a phase comparator (3) which is commonly used with said first PLL circuit; a second loop filter (9) being a low pass filter connected to receive the difference signal from said phase comparator (3) and providing a voltage corresponding the phase difference between said reference frequency (f ) and said comparison frequency (f ); an operational amplifier (10) for amplifying said output voltage of said second loop filter, and feeding it back to the voltage controlled crystal oscillator means; a first switch (S2) provided between said voltage controlled.crystal oscillator (VCXO) means and one input terminal of said phase comparator (3); and a circuit changing switch (Sl-l) provided in the output side of phase comparator (3), for switching the output signal of said phase comparator to the first or second loop filter (4 to 9).
Claim 10
Dependent Claim
79 words
A frequency synthesizer according to claim 8, wherein: said first and second switches (S2 and S3) are controllable for switching on and off simultaneously when the power switch (Sp) is switched on; and said circuit changing switch (Sl-l) is controllable for switching to the first loop filter (4) when the first and second switches are switched on, and switched back to the second loop filter (9) at the same time that the first and second switches are switched off.
Claim 11
Dependent Claim
58 words
A frequency synthesizer according to claim 8, wherein said voltage controlled crystal oscillator means comprises: a voltage controlled crystal oscillator (VCXO) (1-1) for generating an M multiple of the reference frequency (f r ), where M is an integer, and a 1/M frequency divider (2) for dividing the output frequency of said voltage controlled crystal oscillator by M.
Claim 12
Dependent Claim
115 words
A frequency synthesizer according to any one of claims 1 to 4, further comprising an automatic phase control (APC) circuit which comprises: a third phase coparator (11) of which one input terminal is connected to said refrence frequency generating means via a fifth switch (S6), and another input terminal is connected to said second switch (S3) via a sixth switch (S7); a low pass filter (12) for receiving the output of said third phase comparator and for providing a control signal; and a variable phase shifter (13) inserted between said frequency divider means and said second switch (S3), said variable phase shifter (13) being controllable by said control signal from said low pass filter (12).
Claim 13
Dependent Claim
79 words
A frequency synthesizer according to claim 11, wherein: said fifth and sixth switches (S6 and S7) are controllable for switching on and off simultaneously when the power switch (Sp) is switched on; and said first and second switches (S2 and S3) are controllable for simultaneous switching on when the fifth and sixth switches are switched on, and simultaneous switching off after the fifth and sixth switches are switched off but while the power switch (Sp) is still switched on.
References Cited (Backward Citations)
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