Method and apparatus for synchronizing the timing subsystems of the physical modules of a local area network

Claim 2

A local area network (10) comprising a plurality of physical modules (12) which communicate with one another over a network bus (14), character- ized in that a) each module (12) includes means for producing clock signals (44), the clock signals of each physical module having substantially the same frequency; b) each module (12) further includes timing means (48) and each timing means responsive to the clock signals applied to it produces fine resolution (74), synchronizing (76), and real time (78) timing signals; c) each module also includes means (82,88) for maintaining an internal sense of time; d) a first one of said timing means (48) is selectable to produce timing frames (60) and to transmit said timing frames over the network bus (14) in synchronism with the production of its synchronizing timing signals; e) each timing means (48) other than the selected one which receives a timing frame transmitted over the network bus (14), synchronizes its internal sense of time with that of the selected timing means transmitting the timing frame.

Claim 3

The local area network of claim 1, charac- terized in that the network bus (14) comprises two cables (14A,14B), and a second timing means (48) is selected to produce and to transmit timing frames (60), the first selected timing means transmitting its timing frames over one cable and the second over the second cable.

Claim 4

The local area network of claim 2, charac- terized in that each timing means (48) when enabled receives timing frames (60) transmitted over the two cables (14A,14B) alternately, and that the second selected timing means synchronizes its internal sense of time to that of the first.

Claim 5

The local area network of claim 3, charac- terized in that each timing means (48) has the capability of synchronizing its internal sense of time with the frequency of a source of A.C. electric power for its module (12).

Claim 6

The local area network of claim 4, charac- terized in that the period of the fine resolution, synchronizing and real time timing signals are respectfully 100 µ sec., 50 m sec and 1 second.

Claim 7

The local area network of claim 5, charac- terized in that the internal sense of time includes 2 32 bits of time in seconds.

Claim 8

The local area network (10) of one of the preceding claims, in which a) each module (12) is adapted to be energized by a source of A.C. power having a given frequency; b) each module (12) includes a module central processor unit (32) (MCPU); and c) each MCPU includes a clock means (44) for producing clock signals, the clock signals of each MCPU having substantially the same period; characterized in that d) each MCPU (32) includes an associated digital timing subsystem (48) each said digital timing subsystem, in response to clock signals applied to it from the clock means of its associated MCPU, produces a fine resolution timing signal (74) a synchronizing timing signal (76), and a real time timing signal (78), and maintaines the current real time (88) the number of fine resolution timing signals (82), and the number of synchronizing timing signals produced by it since the most recent real time timing signal was produced (86); and the number of fine resolution timing signals produced since the last synchronizing timing signal was produced (80); e) the digital timing subsystem (48) of one of said MCPU's (12) is designated as a master timing subsystem for the network, the master timing subsystem transmitting a timing frame (60) over the network bus (14) in synchronism with the production of its synchronizing timing signals, f) said timing frame (60) includes a synchronizing code (102), the number of synchronizing timing signals and the current time since the last real time timing signal was produced; and g) each of the digital timing subsystems (48) other than the master upon the receipt of a timing frame (60) transmitted over the network bus (14), synchronizes its means for maintaining the current real time and the number of fine resolution timing signals with the information contained in each received timing frame.

Claim 9

The local area network of claim 7, charac- terized in that each of the digital timing subsystems (48) can be commanded by its MCPU (32) to receive timing frames (60) transmitted over the two cables alternately (14A,14B).

Claim 10

The local area network of claim 8, charac- terized in that each digital timing means (48) can be commanded by its MCPU (32) to synchronize its current real time with its frequency of a source of A.C. electric power (Fig. 3), and that the master is normally so commanded.

Claim 11

The local area network (10) of one of the claims 7 to 9, characterized in that a) each of said timing means (48) maintains the number of fine resolution and synchronization timing signals produced since the last real time timing signal was produced; and increments (78) its means for maintaining (88) the current real time each time a real time timing signal is produced; b) selected ones of said timing means (48) produce a timing frame, each timing frame (60) produced by a selected timing means (48) including a synchronizing character (102) and characters defining the selected timing means current real time, and the number of synchronization timing signals produced since the last real time timing signal was produced; c) each timing means (48) other than the master when enabled, in response to the receipt of a timing frame (60) transmitted by the master over the network bus (14), synchronizes its production of fine resolution timing signals with that of the master so that the timing means (48) of each module (12) is in substantial synchronism, within a predetermined number of fine resolution timing signal, with that of the master and maintains its current real times substantially equal of that of the master.

Claim 12

The local area network of claim 10 in which two timing means (48) are selected to produce timing frames (60) one of said selected timing means being designated as a slave and in which the network bus comprises two cables (14A,14B); character- ized in that the master transmits timing frames over one cable of the network bus (14) and the slave transmits timing frames over the other cable.

Claim 13

The local area network of claim 11, charac- terized in that each timing means (48) has the capability when enabled by its MCPU (32) of synchronizing its means for maintaining its current real time with the frequency of its source of the A.C. power for the module (12).

Claim 14

The local area network of claim 12, charac- terized in that a timing means (48) is enable to synchronize its means for maintaining its current real time with the frequency of the A. C . power supply if synchronization with timing frames (60) transmitted by the master and slave are lost.

Claim 15

The local area network of one of the preceding claims, characterized in that the maximum number "m" of modules is m = 64.

Claim 18

The method of claim 15 in which the network includes two parallel cables (14A,14B), charac- terized by the steps of: c) designating a second timing subsystem (48) to produce timing frames (60) one being designated as the slave and the other as the master timing subsystems d) causing each of the two designated timing subsystems to transmit timing frames over different ones of said cables (14A,14B).

Claim 19

The method of claim 16, characterized by synchronizing the internal sense of time of the master with the frequency of a source of A.C. electric power.

Claim 20

The method of claim 17, characterized in that each timing subsystem (48) checks to see if timing frames are received within an expected time period - a predetermined window, and synchronizes its internal sense of time to that of the transmitting timing subsystem only if timing frames are received within said expected time period plus the predetermined window.

Claim 21

The method of claim 18, characterized by e) causing each timing subsystem synchronizing its internal sense of time to the frequency of an A.C. power supply to check the frequency of the A.C. power supply to determine if it is within predetermined limits; and f) causing a timing subsystem not to synchronize its internal sense of time with the frequency of its A.C. power supply if the frequency of'the power supply falls outside the predetermined limits a predetermined number of times within a predetermined period of time.