Semiconductor device having a polycrystalline silicon interconnection layer and method for its manufacture

Claim 2

A semiconductor device, comprising an electrically conductive semiconductor region (11, 12; 31), a silicide layer (24) formed thereon, and an electrically conductive polycrystalline member (33) formed on said silicide layer.

Claim 3

A semiconductor device according to claim 1, wherein said semiconductor is silicon and said polycrystalline member is formed of polycrystalline silicon.

Claim 4

A semiconductor device according to claim 1, wherein said silicide layer (24) extends over the substantially whole surface of said semiconductor region (11, 12).

Claim 5

A semiconductor device according to claim 3, wherein said polycrystalline member (33) extends only part of said silicide layer (24).

Claim 6

A semiconductor device according to claim 2, wherein said semiconductor device is a large scale integrated circuit including insulated gate field effect transistors (Trl, Tr2, Tr3, Tr4) each of which comprises a pair of source/drain regions (11, 12) formed in a surface portion of a semiconductor substrate (10) and an insulated gate electrode (31, 24) formed on the semiconductor substrate through an insulating layer (20), and said semiconductor region (11, 12) is one of the source/drain regions (11, 12).

Claim 7

A semiconductor substrate according to claim 5, wherein said gate electrode (31, 24) comprises a conductive polycrystalline silicon electrode L31) formed on the insulating layer (20) and a metal silicide layer formed on the polycrystalline silicon electrode (31).

Claim 10

A semiconductor device comprising: a semiconductor substrate (10) having a region (11, 12) doped with impurity of a conductivity type differing from that of said semiconductor substrate; an insulation layer (25) having a window through which said impurity-doped region is exposed; a silicide layer (24) formed on said impulity- doped region through said window; and at least two electrodes (30, 33) formed on said silicide layer (24), one of said electrode being mainly formed of a same main component material as said semiconductor substrate.

Claim 11

A semiconductor device comprising: a semiconductor substrate (10) having a region (11, 12) doped with impurity of a conductivity type differing from that of said semiconductor substrate; an insulation layer (25) having a window through which said impurity-doped region is exposed; a silicide layer (24) formed on said impulity- doped region through said window; and at least two electrodes (30, 33) formed on said silicide layer (24), one of said electrode being mainly formed of a same main component material as said semiconductor substrate.

Claim 12

A semiconductor device according to claim 8, wherein said semiconductor device includes an insulated gate field effect transistor (IGFET) (Tr), said impurity-doped region constituting one of source/drain regions (11, 12) of said IGFET.

Claim 13

A semiconductor device according to claim 8, wherein said semiconductor device includes at least two IGFETs (Trl, Tr2), and said one electrode is connected to a source/drain region of one of said IGFETs and serves as a gate electrode of the other IGFET.

Claim 14

ll. A method of manufacturing a semiconductor device formed in a semiconductor substrate and comprising at least two electrodes connected to a contact hole formed in a surface region of the substrate doped with impurity of a conductivity type differing from that of a semiconductor substrate, one of said electrodes being mainly made of a same main component material as that of said semiconductor substrate, comprising the steps of: forming said contact hole locally in an insulation film formed on said semiconductor substrate for exposing the surface region of said semiconductor substrate; forming a silicide layer on said surface region through said contact hole; forming a film serving as the first electrode made of a material containing a same main component material as that of said substrate so as to cover said contact hole; removing selectively said film for exposing again part of said contact hole while leaving said film for said first electrode in the other part of the contact hole; forming a film serving as the second electrode so as to cover said exposed part of the contact hole; and removing selectively said film for said second electrode to leave the second electrode contacting part of said contact hole.

Claim 15

ll. A method of manufacturing a semiconductor device formed in a semiconductor substrate and comprising at least two electrodes connected to a contact hole formed in a surface region of the substrate doped with impurity of a conductivity type differing from that of a semiconductor substrate, one of said electrodes being mainly made of a same main component material as that of said semiconductor substrate, comprising the steps of: forming said contact hole locally in an insulation film formed on said semiconductor substrate for exposing the surface region of said semiconductor substrate; forming a silicide layer on said surface region through said contact hole; forming a film serving as the first electrode made of a material containing a same main component material as that of said substrate so as to cover said contact hole; removing selectively said film for exposing again part of said contact hole while leaving said film for said first electrode in the other part of the contact hole; forming a film serving as the second electrode so as to cover said exposed part of the contact hole; and removing selectively said film for said second electrode to leave the second electrode contacting part of said contact hole.

Claim 16

A method of manufacturing a semiconductor device according to claim 11, wherein said semiconductor device includes an insulated gate field effect transistor (IGFET), and said surface region constitutes one of source/drain regions of said IGEFT.