Image signal filtering

Claim 4

A method as recited in Claim 2 wherein said filtering step comprises the further step of processing the image data in the other of said main and sub-scanning directions by obtaining from said signals filtered in said one direction further first and second sum signals and subjecting said further first and second sum signals to a cumulus computation.

Claim 5

A method as recited in Claim 2 wherein said 2k image signals represent two data sequences, k computations apart, and said first selecting step comprises the step of selecting substantially all of k sequential signals in a scan in one direction, and said remaining k image signals represent a sequence forming the first sum sing n al of a k th previous computation, saind second summing step providing a sum of a sequence forming first sum signal of a k th previous computation.

Claim 6

Apparatus for filtering an image singal in a main scanning direction comprising storege means for receiving a scanning signal in the main scanning direction, means for performing a pair of cumulus computation, defined as providing an n th result R = R n-1 + P n - Q n for an n th computation where R n-1 is a result of an immediately proceeding computation and where P n and Q n are image signals input to said means for performing said cumulus computations, and means for performing a third cumulus computation on results of said paer of said cumulus computation, to provide a filtered signal output representing a filtering of said scanning signal in the main scanning direction, said means for performing a pair of cumulus computations including a structure for performing first cumulus computation connected for receiving positive and negative inputs from an element of said scanning signal and from an element of said scanning signal delayed by k scan elements, and including a structue for performing a second cumulus computation connected for receiving positive and negative inputs from said element of said scanning signal delayed by k scan elements and srom an element of said scanning signal delayed by - 2k scan elements, outputs representing said first and second cumulus computations providing prositive and negative inputs to said means for performing said third cumulus computation.

Claim 7

Apparatus for filtering an image singal in a main scanning direction comprising storege means for receiving a scanning signal in the main scanning direction, means for performing a pair of cumulus computation, defined as providing an n th result R = R n-1 + P n - Q n for an n th computation where R n-1 is a result of an immediately proceeding computation and where P n and Q n are image signals input to said means for performing said cumulus computations, and means for performing a third cumulus computation on results of said paer of said cumulus computation, to provide a filtered signal output representing a filtering of said scanning signal in the main scanning direction, said means for performing a pair of cumulus computations including a structure for performing first cumulus computation connected for receiving positive and negative inputs from an element of said scanning signal and from an element of said scanning signal delayed by k scan elements, and including a structue for performing a second cumulus computation connected for receiving positive and negative inputs from said element of said scanning signal delayed by k scan elements and srom an element of said scanning signal delayed by - 2k scan elements, outputs representing said first and second cumulus computations providing prositive and negative inputs to said means for performing said third cumulus computation.

Claim 8

Apparatus as recited in Claim 5 wherein said storege means comprises shift register means having 2k+l storage stages.

Claim 9

Apparatus as recited in Claim 5 wherein said means for performing a third cumulus compuataion includes adding means receiving positive and negative inputs, said adding means having a further positive input connected for receiveing after a single delay period an output thereof.

Claim 10

Apparatus as secited in Claim 7 wherein said means for performing pair of cumulative computative computations includes a pair of structures substantially identical to said means for performing said third cumulative computation.

Claim 11

Apparatus as recited in Claim 7 wherein said means for performing a pair of cumulative computations includes first cumulativge computing means comprising adding means having a pair of positive inputs and a negative input, said adding means connected for receiving at one of said positive inputs an element of said scanning signal, and connected further for receiving at said negative input an element of said scanning signal after delay by k scan elements, and surther connected for receiveing at the second positive input an output thereof delayed by one delay period, and said second cumulative computing means comprises shift register means having k stages, a first stage connected to receive an output form said first cumulative computing means, and a k th stage connected to provide an output to a negative input of said adding means fo said means for performing said third cumulative computation.

Claim 12

Apparatus as recited in Claim 9 wherein waid storage means comprises further shift register means having k+1 stages, said first stage providing said first positive input to said first cumulative computing means and said k+l th stage providing said negative input to said first comulative computing means.

Claim 13

Apparatus as recited in Claim 6 wherein said shift register means a plurality of line.memory storage means provided in cascade arrangement, each of said line memory storege means including 2k+1 storage cells for elements fo one scanning line.

Claim 14

Apparatus as recited in Claim 5 or 11 wherein said means for performing a third cumulus computation includes adding means receiving positive and negative inputs, said adding means having a further positive input delayed by one line scan.

Claim 15

Apparauts as recited in Claim 12 wherein said structures for performing said first and second cumulative computation are substantially identical to said means for performing said third cumulative computation.

Claim 16

Apparatus as recited in Claim 13 wherein said plurality of line memory storage means comprises 2k+1 line memory storege means, an output of a first line storege means and an output of a k+1 th line sotrage means providing positive and negative inputs to said structure for performing said first cumulative computing means, an output from said k+l th line memory storage means and an output from said 2k+1 th line storage means providing respectively positive and negative inputs to said structure for performing said second cumulus computation.

Claim 17

Apparatus as recited in 12 wherein the stracture for performing the first cumulus computation is substantially identical to said means for perforing the third cumulus computation and the stracture for performing the second cumulus computation comprises k-1 line memory storage means connected in cascade with the line memory storage means at the output of said structure for performing the first cumulus computation, and output of the last of said k-1 line memory storage means providing a negative input for said means for performing a third cumulus computation.

Claim 18

Apparatus as recited in 12 wherein the stracture for performing the first cumulus computation is substantially identical to said means for perforing the third cumulus computation and the stracture for performing the second cumulus computation comprises k-1 line memory storage means connected in cascade with the line memory storage means at the output of said structure for performing the first cumulus computation, and output of the last of said k-1 line memory storage means providing a negative input for said means for performing a third cumulus computation.

Claim 19

Apparatus as recited in Claim 8 wherein said storage means comprises shift register means having 2k+l storage elemen5ts further ccomprising means for imposing a weight coefficient increasing from edge image signals to a k th image signal, including foruth and fifth cumulus computation means each substantially identical to said means for performing a third cumulus computation, multiplying means connected to a k+1 stage of said shift register means for multiplying by k a signal stored therein, said multiplying means and the output of said adding means in said stractured for performing said first cumulus computation provided to said fourth cumu- lus computation means as negative and positive inputs, respectively, the output of said multiplying means and of said adding means of said structure for performing said second cumulus computation provided as positive and negative inputs to said fifth cumulus computation means, first and second subtracting means connected for subtracting output of said stractres for performing said first and second cumulus computations from multiples fo outputs of said fourth and fifth cumulus computation means said first and second subtracting means providing positive and negative inputs to said means for performing said third cumulus computation, said output of said means for performing said third cumulus computation providing an unsharp signal for input to a third subtracting means for subtraction from a multiple of a sum of an output of said fourth cumulus computation means and a difference between the output of said fifth cumu- lus computation means and the output of said structure for performing said second cumulus computation, to provide an unsharp signal weighted by weight coefficients varying in accordance with a quadratic function increasing from edge image signals to the k th image signal.