EP0174125A2
Expired / Lapsed
EP
⏱️ 0.0 years remaining
Digital data receiver
Assignee: University of Toronto Innovations Foundation
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Filing: 1985-08-16
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Granted: —
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Expires: 2005-08-16
Abstract
Abstract @ A data receiving system for digital data communication is described which uses asynchronous sampling and language interpolation or prolate spheroidal function on the received signal. A received analogue signal is first asynchronously sampled (22), digitised (26), stored in memory (28) and then processed using interpolation techniques to recover the correct symbol timing of the symbols in the digitised data. The minimum sampling rate commensurate with channel band width is used. The correct symbol timing is continuously adjusted within certain predetermined limits of the interpolation interval using a "jumping" algorithm which permits continuous symbol recovery. The recovered symbols are then equalised (40) to compensate for distortion and decoded (44) to give the originally encoded data. When bursts of data are being transmitted the data stored in memory (28) is replayed to ensure that all data in the data burst is used for communication and that there is no transmission overhead requiring extra symbols for synchronisation. In one embodiment the received signal is used to generate real and imaginary components (32,34) which are then subjected to interpolation (36,38) and, the interpolation is controlled using a digital filter and algorithm which optimises filter coefficients to recover the symbol timing.
Inventors
- 👤 Jui Lin Yen
- 👤 Rui Wang
Bibliographic Details
Application Number
—
Jurisdiction
EP
Data Source
google_patents
Last Synchronized
2026-10-24 01:04
CPC Classifications
H; H04; H04L; H04L7/00; H04L7/0016; H04L7/002; H04L7/0029; H04L25/00; H04L25/02; H04L25/05; H04L7/005
Claims Analysis
Total Claims: 22
Claim 1
Independent Claim
236 words
A data receiver system for processing a received analog signal which comprises data encoded with a plurality of symbols, the data receiver system being characterised by: input means (20) for receiving the analog signal; sampling means (22) associated with the input means (20) for sampling the analog signal, said sampling means (22) being coupled to asynchronous clock means (24) connected to drive the sampling means (22), the asynchronous clock means (24) being unsynchronised with the data transmission rate; analog to digital converter means (26) connected to the output of the sampling means (22) for digitising sampled analog outputs to provide digital signals; digital storage means (28) connected to the output of the converter means (26) for storing said digitised data therein; symbol acquisition means (30,36,38) having a first input connected to the output of the storage means (28) for acquiring said symbol information from said digitised signals; symbol acquisition control means (42) having an input connected to the output of the symbol acquisition means (30,36,38), and an output connected to a second input of symbol acquisition means (30,36,38), said symbol acquisition control means (42) constituting means effective to obtain correctly timed symbols by interpolation; decoder means (44) having an input connected to the output of the symbol acquisition means (30,36,38), said decoder means (44) generating decoded digital data from said correctly timed signals, said decoder means (44) having an output for outputting said decoded digital data.
Claim 2
Dependent Claim
236 words
A data receiver system for processing a received analog signal which comprises data encoded with a plurality of symbols, the data receiver system being characterised by: input means (20) for receiving the analog signal; sampling means (22) associated with the input means (20) for sampling the analog signal, said sampling means (22) being coupled to asynchronous clock means (24) connected to drive the sampling means (22), the asynchronous clock means (24) being unsynchronised with the data transmission rate; analog to digital converter means (26) connected to the output of the sampling means (22) for digitising sampled analog outputs to provide digital signals; digital storage means (28) connected to the output of the converter means (26) for storing said digitised data therein; symbol acquisition means (30,36,38) having a first input connected to the output of the storage means (28) for acquiring said symbol information from said digitised signals; symbol acquisition control means (42) having an input connected to the output of the symbol acquisition means (30,36,38), and an output connected to a second input of symbol acquisition means (30,36,38), said symbol acquisition control means (42) constituting means effective to obtain correctly timed symbols by interpolation; decoder means (44) having an input connected to the output of the symbol acquisition means (30,36,38), said decoder means (44) generating decoded digital data from said correctly timed signals, said decoder means (44) having an output for outputting said decoded digital data.
Claim 3
Dependent Claim
64 words
A data receiver system as claimed in claim 1, characterised by including replay processing means (49) when the system receives bursts of data, and having an input from said decoder means (44) and an output to said digital storage means (28) for instructing the storage means (28) to replay the entire data burst to ensure that the entire data burst is used for communication.
Claim 4
Dependent Claim
97 words
A data receiver system as claimed in claim 1 or 2, characterised in that said symbol acquisition means (30,36, 38) comprises positive frequency filter means (30) having an input connected to the output of said digital storage means (28), said positive frequency filter means (30) generating phase and quadrature components of said input signal, phase slider means (36,38) having respective inputs for receiving said phase and quadrature components and respective outputs for passing said correctly timed signals, said respective phase slider outputs forming the input to the symbol acquisition control means (42) and the decoder means (44).
Claim 5
Dependent Claim
83 words
A data receiver system as claimed in claim 1 or claim 2 characterised by including equaliser means (40) located between said symbol acquisition means (30,36,38) and said decoder means (44) for compensating for signal distortion, and equaliser control means (48) connected between said decoder means (44) and said equaliser means (40), said equaliser control means (48) constituting means effective to monitor the output of said decoder means (44) and to adjust said equaliser means (40) to compensate for distortion in said decoded signal.
Claim 6
Dependent Claim
75 words
A data receiver as claimed in claim 3 characterised by including equaliser means (40) located between the outputs of said phase slider means (36,38) and said decoder means (44) for compensating signal distortion, equaliser control means (48) connected between said decoder means (44) and said equaliser means (40) constituting means effective to monitor the output of said decoder means (44) and to adjust said equaliser means (40) to compensate for distortion in said decoded signal.
Claim 7
Dependent Claim
91 words
A data receiver as claimed in claim 1, 2 or 4, characterised in that said symbol acquisition control means (42) includes digital filter means (50,56,60) for receiving said phase and quadrature components, and read-only-memory (ROM) means (58) containing storage filter coefficient data for use in the digital filter means (50,56,60), said digital filter coefficients being selected to optimise said symbol acquisition rate, and the digital filter means (50,56,60) having an output connected to said symbol acquisition means (30,36,38) for controlling the symbol acquisition means (30,36,38) to maintain correct symbol acquisition timing.
Claim 8
Dependent Claim
22 words
A data receiver system as claimed in any preceding claim, characterised in that the system is implemented on a single integrated circuit.
Claim 9
Dependent Claim
381 words
A data receiver system for processing a received analog signal comprising a burst of data encoded with a plurality of symbols, the data receiver system being characterised by: input means (20) for receiving the analog signal; sampling means (22) associated with the input means (20) for sampling the analog signal, said sampling means (22) being coupled to asynchronous clock means (24) connected to drive the sampling means (22); analog to digital converter means (26) connected to the output of the sampling means (22) for storing said digitised data therein; positive frequency filter means (30) having an input connected to the output of said digital storage means (28), said positive filter frequency means (30) generating phase and quadrature components of said input signal, a pair of phase slider means (36,38) having a respective input connected to a respective output of the positive frequency filter means (30), said phase slider means (36,38) being for acquiring said symbol information from said digitised signals, phase slider control means (42) having inputs formed by respective outputs of said phase slider means (36,38), said phase slider control means (42) constituting means effective to obtain said correctly timed symbols by interpolation, said phase slider control means (42) including digital filter means (50) for receiving said symbol data in said phase and quadratine components, and read-only-memory (ROM) means (58) containing stored filter coefficient data for use in the digital filter, said filter coefficients being selected to optimise said symbol acquisition rate, and the digital filter means (50) having an output connected to said phase slider means (36,38) for controlling the phase slider means (36,38) to maintain acquisition of said correct symbol timing; equaliser means (40) having inputs connected to the outputs of the phase slider means (36,38), said equaliser means (40) compensating for distortion in said data, decoder means (44) connected to the output of the equaliser means (40) for generating decoded digital data from said correctly timed symbols, said detector means (44) having an output for outputting said decoded digital data, and replay processing means (49) when the system receives bursts of data, and having an input from said decoder means (44) and an output to said digital storage means (28) to replay the entire data burst transmission to ensure the entire data burst is used for communication.
Claim 10
Dependent Claim
381 words
A data receiver system for processing a received analog signal comprising a burst of data encoded with a plurality of symbols, the data receiver system being characterised by: input means (20) for receiving the analog signal; sampling means (22) associated with the input means (20) for sampling the analog signal, said sampling means (22) being coupled to asynchronous clock means (24) connected to drive the sampling means (22); analog to digital converter means (26) connected to the output of the sampling means (22) for storing said digitised data therein; positive frequency filter means (30) having an input connected to the output of said digital storage means (28), said positive filter frequency means (30) generating phase and quadrature components of said input signal, a pair of phase slider means (36,38) having a respective input connected to a respective output of the positive frequency filter means (30), said phase slider means (36,38) being for acquiring said symbol information from said digitised signals, phase slider control means (42) having inputs formed by respective outputs of said phase slider means (36,38), said phase slider control means (42) constituting means effective to obtain said correctly timed symbols by interpolation, said phase slider control means (42) including digital filter means (50) for receiving said symbol data in said phase and quadratine components, and read-only-memory (ROM) means (58) containing stored filter coefficient data for use in the digital filter, said filter coefficients being selected to optimise said symbol acquisition rate, and the digital filter means (50) having an output connected to said phase slider means (36,38) for controlling the phase slider means (36,38) to maintain acquisition of said correct symbol timing; equaliser means (40) having inputs connected to the outputs of the phase slider means (36,38), said equaliser means (40) compensating for distortion in said data, decoder means (44) connected to the output of the equaliser means (40) for generating decoded digital data from said correctly timed symbols, said detector means (44) having an output for outputting said decoded digital data, and replay processing means (49) when the system receives bursts of data, and having an input from said decoder means (44) and an output to said digital storage means (28) to replay the entire data burst transmission to ensure the entire data burst is used for communication.
Claim 11
Independent Claim
100 words
A method of processing transmitted data in a receiver, said transmitted data being encoded into symbols representative of binary codes, said method being characterised by: sampling asynchronously an analog input signal and obtaining analog samples therefrom; digitising said analog samples; storing the digitised analog samples in a storage medium; reading out the stored samples and processing the stored samples to obtain correct symbol timing, said correct symbol timing being obtained in response to an algorithm converging to a non-zero value; equalising said timed signals to compensate for signal distortion and; decoding the equaliser symbol data to produce binary coded data.
Claim 12
Independent Claim
100 words
A method of processing transmitted data in a receiver, said transmitted data being encoded into symbols representative of binary codes, said method being characterised by: sampling asynchronously an analog input signal and obtaining analog samples therefrom; digitising said analog samples; storing the digitised analog samples in a storage medium; reading out the stored samples and processing the stored samples to obtain correct symbol timing, said correct symbol timing being obtained in response to an algorithm converging to a non-zero value; equalising said timed signals to compensate for signal distortion and; decoding the equaliser symbol data to produce binary coded data.
Claim 13
Dependent Claim
42 words
A method of processing data as claimed in claim 9, characterised by including the step of replaying the entire data burst transmission from said storage medium to use all the transmitted data for communication when the transmitted data is in data bursts.
Claim 14
Dependent Claim
25 words
A method of processing data as claimed in claim 10, characterised by including the step of processing said data between received and stored data bursts.
Claim 15
Independent Claim
197 words
A method of processing transmitted data bursts in a digital receiver characterised by: sampling an analogue input signal asynchronously and obtaining analog samples therefrom; converting the analog samples into digital samples; storing the digital samples in a storage medium; reading out the stored digital samples and processing the read-out samples, said processing comprising selecting a first parameter of the read-out sample signal and acting on said first parameter in accordance with a first predetermined algorithm to produce a value of a second parameter; using said second parameter value to recalculate values of said first parameter for successive samples; processing said successive sample parameter values in accordance with a second predetermined algorithm to give average values of said second parameters; processing said averaged values in accordance with a third predetermined algorithm to maintain said second parameter within predetermined limits within the range of each sample, said third predetermined algorithm causing said second parameter to move by one sample in one of a forward and backward direction; replaying a predetermined number of bits of said processed data, said replying utilising the entire data burst transmission for communication, and after said replaying of said processed data obtaining a data output.
Claim 16
Independent Claim
197 words
A method of processing transmitted data bursts in a digital receiver characterised by: sampling an analogue input signal asynchronously and obtaining analog samples therefrom; converting the analog samples into digital samples; storing the digital samples in a storage medium; reading out the stored digital samples and processing the read-out samples, said processing comprising selecting a first parameter of the read-out sample signal and acting on said first parameter in accordance with a first predetermined algorithm to produce a value of a second parameter; using said second parameter value to recalculate values of said first parameter for successive samples; processing said successive sample parameter values in accordance with a second predetermined algorithm to give average values of said second parameters; processing said averaged values in accordance with a third predetermined algorithm to maintain said second parameter within predetermined limits within the range of each sample, said third predetermined algorithm causing said second parameter to move by one sample in one of a forward and backward direction; replaying a predetermined number of bits of said processed data, said replying utilising the entire data burst transmission for communication, and after said replaying of said processed data obtaining a data output.
Claim 17
Dependent Claim
18 words
A method as claimed in claim 18, characterised by said data output being obtained between said data bursts.
Claim 18
Dependent Claim
47 words
A method as claimed in claim 13, characterised in that said first parameter is the value of the signal at the time at which the signal crosses zero and the second parameter is the value of the signal at the time at which the signal crosses zero.
Claim 19
Dependent Claim
24 words
A method as claimed in claim 14, characterised in that the selection of the first and second parameters is achieved by inverse Lagrangean interpolation.
Claim 20
Independent Claim
44 words
A method as claimed in any one of claims 12-15 characterised by including passing said read-out samples through channel equaliser means prior to processing said average values, said channel equaliser means using fractional tap spacing, each tap spacing having an equaliser weight associated therewith.
Claim 21
Dependent Claim
59 words
A method as claimed in claim 16 characterised by replaying a predetermined sample length of about 100 bits a predetermined number of times, and after each replay retaining the resultant equaliser weights for the first pass on the next one hundred samples, and after carrying out the predetermined number of replays, discarding the equaliser weights from the last replay.
Claim 22
Dependent Claim
25 words
A method as claimed in claim 17 characterised in that replaying is repeated for each sample length, until the equaliser converges in the first pass.
References Cited (Backward Citations)
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