EP0174010A2
Expired / Lapsed
EP
⏱️ 0.0 years remaining
Method of capless annealing for group III-V compound semiconductor substrate
Assignee: NEC Corp
•
Filing: 1985-09-03
•
Granted: —
•
Expires: 2005-09-03
Abstract
Abstract A method of capless annealing for an ion implanted substrate of a group III- V compound semiconductor, wherein said ion implanted substrate is placed in an inert ambient with a temperature ranging between 500 to 1000 degrees in centigrade and a pressure ranging from 30 to 100 atmospheres, thereby increasing the deep energy level EL 2 concentration in the surface portion of semiconductor substrate. The resistivity of the compound semiconductor substrate is increased in accordance with the deep energy level EL 2 concentration, this method is conducive to maintenance of the isolation between adjacent semi-conductor elements fabricated on the group III- V compound semi-conductor substrate.
Inventors
- 👤 Takao Matsumura
Bibliographic Details
Application Number
—
Jurisdiction
EP
Data Source
google_patents
Last Synchronized
2026-10-28 07:39
CPC Classifications
H; H10; H10P; H10P95/00; H10P95/90; H10P95/904; Y; Y10; Y10S; Y10S148/00; Y10S148/084
Claims Analysis
Total Claims: 11
Claim 1
Independent Claim
45 words
A method of annealing for an ion implanted substrate of a compound semiconductor , wherein said ion implanted substrate is placed in an inert ambient with a temperature ranging between 500 to 1000 degrees in centigrade and a pressure ranging from 30 to 100 atmospheres.
Claim 2
Independent Claim
45 words
A method of annealing for an ion implanted substrate of a compound semiconductor , wherein said ion implanted substrate is placed in an inert ambient with a temperature ranging between 500 to 1000 degrees in centigrade and a pressure ranging from 30 to 100 atmospheres.
Claim 3
Dependent Claim
45 words
A method of annealing as set forth in claim 1 , in which at least two ion implanted substrates are placed in said inert ambient , both of said ion implanted substrates having respective ion implanted surface portions held in face-to-face contact with each other.
Claim 4
Dependent Claim
27 words
A method of annealing as set forth in claim 1 , in which said ion implanted substrate is formed of a group III- V compound semi- conductor.
Claim 5
Dependent Claim
38 words
A method of annealing as set forth in claim 3 , in which said inert ambient is formed with an inert gas selected from a group of helium , neon , argon , krypton , xenon and nitrogen.
Claim 6
Dependent Claim
25 words
A method of annealing as set forth in claim 3 , in which said inert ambient is formed in a furnace of pyrolytic boron nitride.
Claim 7
Dependent Claim
23 words
A method of annealing as set forth in claim 3 , in which said inert ambient is formed in a furnace of quartz.
Claim 8
Dependent Claim
43 words
A method of annealing as set forth in claim 3 , in which said ion implanted substrate is formed of a compound semiconductor selected from a group of gallium arsenide compound , gallium phosphide compound , gallium antimonide compound and indium arsenide compound.
Claim 9
Dependent Claim
33 words
A method of annealing as set forth in claim 7 , in which said ion implanted substrate is placed in said inert ambient for a time ranging between 10 minutes and 10 hours.
Claim 10
Independent Claim
55 words
A method of annealing for an ion implanted substrate of gallium arsenide compound semiconductor, wherein said ion implanted substrate is placed in an inert ambient with a temperature ranging between 500 to 1000 degrees in centigrade and a pressure ranging from 30 to 100 atmospheres for a time ranging between 10 minutes and 10 hours.
Claim 11
Independent Claim
55 words
A method of annealing for an ion implanted substrate of gallium arsenide compound semiconductor, wherein said ion implanted substrate is placed in an inert ambient with a temperature ranging between 500 to 1000 degrees in centigrade and a pressure ranging from 30 to 100 atmospheres for a time ranging between 10 minutes and 10 hours.
References Cited (Backward Citations)
No citation records indexed.
USPTO Annuity & Maintenance Windows
Maintenance schedule is calculated for granted US utility patents.