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EP0172344A2 Expired / Lapsed EP ⏱️ 0.0 years remaining

Power saving system

Assignee: EMC Corp
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Filing: 1985-06-13
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Granted: —
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Expires: 2005-06-13
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Abstract

Abstract A power saving system according to the present invention in a computer having at least one of a central processing unit (CPU) (1), MODEMs (29, 37), a floating point processor (13) and a floppy disk unit (23) has a common power supply circuit (59), a power control port (41) connected to the CPU (11), and a switch circuit (43) connected to the common power supply circuit (59) and the power control port (41) a power-off control signal for turning-off the unit which is designated to be turned off to the switch circuitry (43). The switch circuitry (43) receives the control signal and turns off the corresponding switch to pass the power supply from the common power supply circuit (59) to the designated unit.

Inventors

  • 👤 Hideji Katayama
  • 👤 Etsuo Iijima
  • 👤 Masao Nakazawa
  • 👤 Tomoyuki Ide

Bibliographic Details

Application Number —
Jurisdiction EP
Data Source google_patents
Last Synchronized 2026-11-03 18:29
CPC Classifications
G; G06; G06F; G06F1/00; G06F1/26; G06F1/32; G06F1/3203; G06F1/3206; G06F1/3215; G06F1/3234; G06F1/325; G06F1/3278; Y; Y02; Y02D; Y02D10/00

Claims Analysis

Total Claims: 4
Claim 1
Independent Claim 201 words
A power saving system in a computer having at least one of a central processing element (11) for performing data processing and generating a control signal, communicating means (29, 37) for causing said central processing element to communicate with another data processing apparatus, high-speed operating means (13) for operating data from said central processing element at a high speed, and an external storage means (25, 23) comprising: a common power supply (59); control signal generating means (41, 11) for generating a control signal so as to control supply of power to at least one of said external storage means (25, 23), said communicating means (29, 37) and said high-speed operating means (13) in accordance with the control signal from said central processing element (11); and means (43), connected to at least one of said common power supply (59), said control signal generating means (41), said external storage means (25, 23), said communicating means (29, 37) and said high-speed operating means (13), for interrupting the supply of power to at least one of said external storage means (25, 23), said communicating means (29, 37) and said high-speed operating means (13) in accordance with the control signal from said control signal generating means.
Claim 2
Dependent Claim 201 words
A power saving system in a computer having at least one of a central processing element (11) for performing data processing and generating a control signal, communicating means (29, 37) for causing said central processing element to communicate with another data processing apparatus, high-speed operating means (13) for operating data from said central processing element at a high speed, and an external storage means (25, 23) comprising: a common power supply (59); control signal generating means (41, 11) for generating a control signal so as to control supply of power to at least one of said external storage means (25, 23), said communicating means (29, 37) and said high-speed operating means (13) in accordance with the control signal from said central processing element (11); and means (43), connected to at least one of said common power supply (59), said control signal generating means (41), said external storage means (25, 23), said communicating means (29, 37) and said high-speed operating means (13), for interrupting the supply of power to at least one of said external storage means (25, 23), said communicating means (29, 37) and said high-speed operating means (13) in accordance with the control signal from said control signal generating means.
Claim 3
Dependent Claim 84 words
A power saving system according to claim 1, characterized in that said control signal generating means (41) comprises: a central processing element (11) for executing an instruction representing which one of said external storage means (25, 23) said communicating means (29, 37) and said high-speed operating means (13) is subjected to power control, and for generating predetermined control data; and a power control port (41) for generating predetermined binary power control data in accordance with the predetermined control data from said central processing element.
Claim 4
Dependent Claim 53 words
A power saving system according to claim 2, characterized in that said means (43) for interrupting the supply of power comprises switching circuits (49, 51, 53, 55, 57) each of which comprises transistors, said switch circuits being turned on/off in response to the binary power control data from said power control port (41).

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