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EP0171653A2 Expired / Lapsed EP ⏱️ 0.0 years remaining

Analog multiplier circuit

Assignee: HP Inc
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Filing: 1985-07-20
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Granted: —
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Expires: 2005-07-20
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Abstract

Abstract The analog multiplier circuit consists of one or more differential amplifiers (30, 40) coupled to generate first and second currents (5, 6) whose difference varies in response to a first electrical signal (1,2), and each having a summing node for the currents coupled to a signal current source (7, 8, 60) which controls the sums of currents in response to a second electrical signal (3, 4) to make the difference of currents vary in proportion to the product of the signals. Improved accuracy in the multiplication of varying electrical signals is achieved by DC separation between the differential amplifier (30, 40) and the signal current source (7, 8, 60). Bias current for the differential amplifier (30, 40) is provided by a direct current source (17. 18), and the signal current source (7, 8, 60) is AC coupled to the summing node to achieve multiplication of signals. Differential amplifier (30, 40) and signal current source (7, 8, 60) may be emitter coupled transistors (7, 8, 9, 10, 11, 12). AC coupling may be achieved by means of a resistor (15, 16) and a capacitor (13, 14) or by other means.

Inventors

  • 👤 William M. Spaulding, Sr.

Bibliographic Details

Application Number —
Jurisdiction EP
Data Source google_patents
Last Synchronized 2026-10-28 18:43
CPC Classifications
G; G06; G06G; G06G7/00; G06G7/12; G06G7/16; G06G7/163; H; H03; H03D; H03D7/00; H03D7/14; H03D7/1425; H03D7/1433; H03D7/1458; H03D7/1491; H03D2200/00; H03D2200/0041; H03D2200/0043; H03D2200/0047

Claims Analysis

Total Claims: 9
Claim 1
Independent Claim 144 words
An analog multiplier circuit comprising - a differential amplifier for producing a first and a second current flowing through a summing node thereof, the difference between the first and the second current varying in response to a first electrical input signal; and - a signal current source coupled to be responsive to a second electrical input signal for controlling the current flowing through the summing node; wherein - the difference between the first and the second current varies substantially in proportion to the product of the first and the second electrical input signal; characterized in that, for improving accuracy in the multiplication of varying electrical signals, there is provided - a direct current source (17) connected to the summing node for delivering a direct current thereto; and - AC coupling means (13, 15) for AC coupling the signal current source to the summing node.
Claim 2
Dependent Claim 144 words
An analog multiplier circuit comprising - a differential amplifier for producing a first and a second current flowing through a summing node thereof, the difference between the first and the second current varying in response to a first electrical input signal; and - a signal current source coupled to be responsive to a second electrical input signal for controlling the current flowing through the summing node; wherein - the difference between the first and the second current varies substantially in proportion to the product of the first and the second electrical input signal; characterized in that, for improving accuracy in the multiplication of varying electrical signals, there is provided - a direct current source (17) connected to the summing node for delivering a direct current thereto; and - AC coupling means (13, 15) for AC coupling the signal current source to the summing node.
Claim 3
Dependent Claim 52 words
A circuit as in claim 1, characterized in that the AC coupling means comprises a resistor (15) connected to convert the current of the signal current source (7) into a signal voltage and a capacitor (13) connected to couple a signal current to the summing node in response to the signal voltage.
Claim 4
Dependent Claim 50 words
A circuit as in claim 1 or 2, characterized in that - the differential amplifier (30) comprises a first transistor (9) and a second transistor (10) and - the summing node is a connection of the emitter of the first transistor (9) to the emitter of the second transistor (10).
Claim 5
Dependent Claim 305 words
An analog multiplier circuit comprising - a first differential amplifier for producing a first and a second current flowing through a summing node thereof, the difference between the first and the second current varying in response to a first electrical input signal; - a second differential amplifier for producing a third and a fourth current flowing through a summing node thereof, the difference between the third and the fourth current varying in response to the inverse of the first electrical input signal; - a first signal current source coupled to be responsive to a second electrical input signal for controlling the current flowing through the summing node of the first differential amplifier; and - a second signal current source coupled to be responsive to the inverse of the second electrical input signal for controlling the current flowing through the summing node of the second differential amplifier; wherein - the difference between the sum of the first and the third current and the sum of the second and the fourth current varies substantially in proportion to the product of the first and the second electrical input signal; characterized in that, for improving accuracy in the multiplication of varying electrical signals, there is provied - a first direct current source (17) connected to the summing node of the first differential amplifier (30) for delivering a first direct current thereto; - a second direct current source (18) coupled to the summing node of the second differential amplifier (40) for delivering a second direct current thereto; - first AC coupling means (13, 15) for AC coupling the first signal current source (7) to the summing node of the first differential amplifier (30); and - second AC coupling means (14, 16) for AC coupling the second signal current source (8) to the summing node of the second differential amplifier (40).
Claim 6
Dependent Claim 305 words
An analog multiplier circuit comprising - a first differential amplifier for producing a first and a second current flowing through a summing node thereof, the difference between the first and the second current varying in response to a first electrical input signal; - a second differential amplifier for producing a third and a fourth current flowing through a summing node thereof, the difference between the third and the fourth current varying in response to the inverse of the first electrical input signal; - a first signal current source coupled to be responsive to a second electrical input signal for controlling the current flowing through the summing node of the first differential amplifier; and - a second signal current source coupled to be responsive to the inverse of the second electrical input signal for controlling the current flowing through the summing node of the second differential amplifier; wherein - the difference between the sum of the first and the third current and the sum of the second and the fourth current varies substantially in proportion to the product of the first and the second electrical input signal; characterized in that, for improving accuracy in the multiplication of varying electrical signals, there is provied - a first direct current source (17) connected to the summing node of the first differential amplifier (30) for delivering a first direct current thereto; - a second direct current source (18) coupled to the summing node of the second differential amplifier (40) for delivering a second direct current thereto; - first AC coupling means (13, 15) for AC coupling the first signal current source (7) to the summing node of the first differential amplifier (30); and - second AC coupling means (14, 16) for AC coupling the second signal current source (8) to the summing node of the second differential amplifier (40).
Claim 7
Dependent Claim 128 words
A circuit as in claim 4, characterized in that - the first AC coupling means (13, 15) comprises a first resistor (15) connected to convert the current of the first signal current source (7) into a first signal voltage, and a first capacitor (13) connected to couple a first signal current to the summing node of the first differential amplifier (30) in response to the first signal voltage; and - the second AC coupling means (14, 16) comprises a second resistor (16) connected to convert the current of the second signal current source (8) into a second signal voltage, and a second capacitor (14) connected to couple a second signal current to the summing node of the second differential amplifier (40) in response to the second signal voltage.
Claim 8
Dependent Claim 48 words
A circuit as in claim 4 or 5, characterized in that - the first signal current source is a first current output port of a third differential amplifier (60); and - the second signal current source is a second current output port of the third differential amplifier (60).
Claim 9
Dependent Claim 65 words
A circuit as in one of claims 4 through 6, characterized in that - the first differential amplifier (30) and the second differential amplifier (40) each comprise a first transistor (9, 11) and a second transistor (10, 12); and - each summing node is a connection of the emitter of the respective first transistor (9,11) to the emitter of the respective second transistor (10, 12).

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