EP0167351A2
Expired / Lapsed
EP
⏱️ 0.0 years remaining
Signal multiplexing circuit
Assignee: Nortel Networks Ltd
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Filing: 1985-06-26
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Granted: —
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Expires: 2005-06-26
Abstract
Abstract Bidirectional communication of voice analog and data message signals over a two wire telephone line (16) that inter-connects several electronic key telephone station sets (18) with a digital access circuit (13) of a central data and voice communication facility (19) is achieved by a multiplexing circuit that functions either as a set interface (17) for a telephone or as a line card interface (11) for the access circuit (13). Data messages originating at a key pad (52) of any set or which are input to an interface bus of the multiplexing circuit are stored in a shift register (23) for subsequent modulation of a high band carrier signal, but only one interface (11) (17) may enter a transmission mode at one time. Transmission priority is therefore assigned by a controller (25) to the interface (11) (17) that first attempts transmission on an inactive line (16), i.e., in the absence of the carrier signal. With transmission initiated, all other interfaces (11) (17) enter a monitor mode to listen but not act on the transmitted message. Errors in transmissions caused by line noise, or collision transmissions between two or more interfaces (11) (17) are resolved via message transactions between the interfaces. Retransmission priority based on the unique addresses of the calling interfaces (11) (17) resolves collision issues with priority going to the lowest address. Controllable transmit and receive equalizers (36') (37') define analog signal paths in the line card interface (11) and are always in an operational mode. Corresponding equalizers (36) (37) in the set interface (17) are normally quiescent and become fully operational only after a correct address match between calling and called interfaces (11) (17) occurs and the called interface responds with a line signal acknowledging receipt of a valid message. A codec (20) may then be enabled and bidirectional communication between a set (18) and the facility (19) is established with voice and signalling being frequency division multiplexed on the line (16).
Inventors
- 👤 Nicholas Tsiakas
- 👤 Stephen K. Sunter
- 👤 Ronald G. Wellard
- 👤 Lawrence H. Sasaki
Bibliographic Details
Application Number
—
Jurisdiction
EP
Data Source
google_patents
Last Synchronized
2026-11-10 01:58
CPC Classifications
H; H04; H04L; H04L12/00; H04L12/28; H04L12/40; H04L12/40006; H04L12/40013; H04L12/407; H04L12/413; H04M; H04M11/00; H04M11/06; H04M9/00; H04M9/002; H04M9/008; H04L12/40143; H04L12/40163
Claims Analysis
Total Claims: 17
Claim 1
Independent Claim
226 words
A signal multiplexing circuit selectively operable as a line card interface (11) for a digital access circuit (13) of a central data and voice communication facility (19) and as a station set interface (17) for a data and voice station (18), and which is controllably operable for bidirectional communication between the line card interface (11) and addressable ones of a plurality of station interfaces (17) interconnected via a two wire telephone line (16), comprising: line sampling means (24) (31) responsive to a carrier signal for detecting an active line state in the presence of the signal on the line (16) and an inactive line state in the absence thereof; transmit register means (23) responsive to a data message bit field input thereto for storing the bits until the occurrence of a predetermined.inactive line state; controller means (25) responsive to the detected inactive line state for enabling a serial data bit output of the register means (23); modulator means (26) having an input coupled to the data output for modulating a high band carrier signal and outputing the signal on the line (16); and equalizer means (36) (37) including analog signal receiving and transmitting paths connected between signal inputs thereto and the line .(16) for controllably enabling and disabling the paths in response to predetermined ones of data message bit fields input to the controller means (25).
Claim 2
Dependent Claim
226 words
A signal multiplexing circuit selectively operable as a line card interface (11) for a digital access circuit (13) of a central data and voice communication facility (19) and as a station set interface (17) for a data and voice station (18), and which is controllably operable for bidirectional communication between the line card interface (11) and addressable ones of a plurality of station interfaces (17) interconnected via a two wire telephone line (16), comprising: line sampling means (24) (31) responsive to a carrier signal for detecting an active line state in the presence of the signal on the line (16) and an inactive line state in the absence thereof; transmit register means (23) responsive to a data message bit field input thereto for storing the bits until the occurrence of a predetermined.inactive line state; controller means (25) responsive to the detected inactive line state for enabling a serial data bit output of the register means (23); modulator means (26) having an input coupled to the data output for modulating a high band carrier signal and outputing the signal on the line (16); and equalizer means (36) (37) including analog signal receiving and transmitting paths connected between signal inputs thereto and the line .(16) for controllably enabling and disabling the paths in response to predetermined ones of data message bit fields input to the controller means (25).
Claim 3
Dependent Claim
37 words
A circuit as claimed in Claim 1 wherein the line sampling means (24) (31) includes demodulator means (29) having an input connectable to the line (16) for detecting the data message bit field carried by the signal.
Claim 4
Dependent Claim
33 words
A circuit as claimed in Claim 2 wherein the line sampling means (24) (31) further includes receive register means (32) to which the detected bit field is coupled for storing the bits thereof.
Claim 5
Dependent Claim
56 words
A circuit as claimed in Claim 3, further comprising: bus interface means (20) having a data input connected to a first output of the receive register means (32), a bidirectional data port (14) connectable to the digital access circuit (13) and a data output connected to a first data input of the transmit register means (23).
Claim 6
Dependent Claim
30 words
A circuit as claimed in Claim 4, further comprising: means for disabling a codec (20") portion of the digital access circuit (13) during bidirectional communication between the interfaces (11) (17).
Claim 7
Dependent Claim
73 words
A circuit as claimed in Claim 5, further comprising: encoder means (22) having a data bus (87) output connected to a second data input of the transmit register means (23) and a plurality of inputs connectable to a switching matrix (86); and means (22) for periodically scanning the crosspoints of the matrix (86) for generating predetermined data message bit fields in response to crosspoint closures and outputing same on the data bus (87).
Claim 8
Dependent Claim
36 words
A circuit as claimed in Claim 6, further comprising: decoder means (113) having a data input connected to a second output of the receive register means (32)and acorresponding output adapted to drive a visual display (53).
Claim 9
Dependent Claim
41 words
A circuit as claimed in Claim 7, wherein respective ones of the analog signal receiving and transmitting paths include a low pass filter (41) (43) to reduce crosstalk between voice signals of the station and the modulated high band carrier signal.
Claim 10
Dependent Claim
51 words
A circuit as claimed in Claim 8, wherein the input of the demodulator means (29) is connected to the line (16) via a first high pass filter (31) and the carrier signal output of the modulator means (26) is connected to the line (16) via a second high pass filter (27).
Claim 11
Dependent Claim
53 words
A circuit as claimed in Claim 9, wherein the analog signal receiving and transmitting paths include line coupling means (28) (30) intermediate the signal multiplexing circuit and the line (16) for isolating the circuit from the line and converting analog voltage signals output from the multiplexing circuit to a predetermined line driving current.
Claim 12
Dependent Claim
103 words
A circuit as claimed in Claim 10, wherein the coupling means (28) comprises: a signal coupling transformer (58) having first and second isolated windings, the former being connectable to the line (16) and the latter being connected directly to the analog signal receiving path; a first line driver amplifier (56) having an input connected to the analog signal transmitting path and an output connected to the second winding; means (45) for detecting a station set operating voltage on the line; and means (35) responsive to the detected operating voltage for establishing a source .(44) of constant operating current for the signal multiplexing circuit.
Claim 13
Dependent Claim
27 words
A circuit as claimed in Claim 11, further comprising visual display means (53) operably connected to the visual display data output for visually indicating the status thereof.
Claim 14
Dependent Claim
142 words
A circuit as claimed in Claim 10, wherein the coupling means (30) comprises: a hybrid transformer (80) having first and second isolated windings, the former being connectable to the line and having a split center-tap for connection across a battery (33) that functions as a line voltage source, and the latter having a center-tap with a first half of the center-tapped winding being connected directly to the analog signal receiving path, and the second half of the center-tapped winding being connected to the output of a second line driver amplifier (81) having an input connected to the analog signal transmitting path, and a third isolated winding (85) serially connected with a balance current circuit (84).across a source of operating current that conducts a balancing current through the third winding (85) to reduce dc flux in the core of the hybrid transformer (80).
Claim 15
Dependent Claim
112 words
A circuit as claimed in Claim 12 further comprising an electronic telephone station set (18) that includes: a transmitter (40) connected to the input of the analog signal transmitting path; a receiver (42) connected to the output of the analog signal receiving path; a key pad (52) having a switching matrix (86) with three dedicated crosspoints for establising a three bit binary address that uniquely identifies individual ones of a plurality of station sets connected to the line, the switching matrix (86) being connected to the plurality of inputs of the encoder means (22) and wherein, the visual display means (53) comprises a liquid crystal display of the telephone station set (18).
Claim 16
Dependent Claim
133 words
A circuit as claimed in Claim 14 wherein the transmitting path of the equalizer means (36) further comprises: a transmit gain control circuit (102) having an input connected to the transmitter (40), a control input connected to the controller means (25) and responsive to a first control signal therefrom for controlling the signal gain of the transmitting path, and an output connected to an input of the low pass filter (41). a buffer amplifier (160) having an output connected to the input of the first line driver amplifier (56); and a transmit control gate (38) connected between an output of the low pass filter (41) and an input of the buffer amplifier (160) to establish a.controllable signal connection therebetween in response to gate enabling and disabling control signals from the controller means (25).
Claim 17
Dependent Claim
132 words
A circuit as claimed in Claim 15 wherein the receiving path of the equalizer means (37) further comprises: a receive gain control means (103) having an input connected to the second isolated winding of the signal coupling transformer (58) via the low pass filter (43) of the receiving path and a control input connected to the controller means (25) and responsive to the first control signal for controlling the signal gain of the receiving path; an outputamplifier (142) having an output connected to the receiver (42); and a receive control gate (39) connected between an output of the receive gain control circuit (103) and an input of the output amplifier (142) to establish a controllable signal connection therebetween in response to gate enabling and disabling control signals from the controller means (25).
References Cited (Backward Citations)
No citation records indexed.
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