EP0167339A2
Expired / Lapsed
EP
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Logic circuit
Assignee: Sony Corp
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Filing: 1985-06-25
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Granted: —
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Expires: 2005-06-25
Abstract
Abstract Logic circuits based on a differential amplifier with the common emitters thereof being connected through a constant current source generally require the use of a reference voltage (Vr) and associated transistor for each such differential amplifier to provide the reference level against which the two inputs (A, B) are compared to obtain the necessary logic operations. In order to eliminate the requirement for the reference voltage and the transistor, the input signals (A, B-) are selected to have the same relative amplitude difference (VL) between the high and low levels thereof and one of the two input signals is further controlled to be shifted relative to the other one by an amount equal to 1/2 such selected amplifier difference. The differential amplifier (42, 44) has a constant current source (50) and the respective output circuits (56, 66) are connected in emitter-follower configuration having constant current source resistors (60, 70) across which the output voltages are taken. By selecting the relative resistor values, the desired shift (1/2 VL) of the relative output level can be obtained. By employing additional sets of transistors in the differential amplifier, multiple inputs are accommodated and by utilizing output circuits having selected resistor value relationships, corresponding multiple outputs are obtained.
Inventors
- 👤 Norio Shoji
- 👤 Masashi Takeda
Bibliographic Details
Application Number
—
Jurisdiction
EP
Data Source
google_patents
Last Synchronized
2026-10-31 17:23
CPC Classifications
H; H03; H03K; H03K3/00; H03K3/02; H03K3/26; H03K3/28; H03K3/281; H03K3/286; H03K3/288; H03K3/2885; H03K19/00; H03K19/02; H03K19/08; H03K19/082; H03K19/086
Claims Analysis
Total Claims: 17
Claim 1
Independent Claim
205 words
A logic circuit of the kind employing a differential amplifier having a plurality of transistors connected in a common emitter configuration, and a constant current source connected to said differential amplifier and a voltage source, characterized by: a first input circuit (46) connected to a base of a first one (42) of said plurality of differential amplifier transistors for receiving a binary input signal (A) having a preselected difference (VL) between high and low amplitudes thereof; a second input circuit (48) connected to a base of a second one (44) of said plurality of differential amplifier transistors for receiving a second binary input signal (B-) also having said preselected difference between high and low amplitudes thereof and being level shifted relative to said first input signal by an amount equal to 1/2 of said preselected difference; and an output circuit (64, 66) connected to a collector of one of said differential amplifier transistors (44) for producing output signals (X, X-) having amplitude levels responsive to said first and second binary input signals at least one of said output signals being level shifted by said 1/2 of said preselected difference, whereby said output signals are obtained without a reference voltage being applied to said differential amplifier.
Claim 2
Dependent Claim
205 words
A logic circuit of the kind employing a differential amplifier having a plurality of transistors connected in a common emitter configuration, and a constant current source connected to said differential amplifier and a voltage source, characterized by: a first input circuit (46) connected to a base of a first one (42) of said plurality of differential amplifier transistors for receiving a binary input signal (A) having a preselected difference (VL) between high and low amplitudes thereof; a second input circuit (48) connected to a base of a second one (44) of said plurality of differential amplifier transistors for receiving a second binary input signal (B-) also having said preselected difference between high and low amplitudes thereof and being level shifted relative to said first input signal by an amount equal to 1/2 of said preselected difference; and an output circuit (64, 66) connected to a collector of one of said differential amplifier transistors (44) for producing output signals (X, X-) having amplitude levels responsive to said first and second binary input signals at least one of said output signals being level shifted by said 1/2 of said preselected difference, whereby said output signals are obtained without a reference voltage being applied to said differential amplifier.
Claim 3
Dependent Claim
20 words
A logic circuit according to claim 1, in which said output circuit includes at least one emitter-follower configuration transistor (66).
Claim 4
Dependent Claim
34 words
A logic circuit according to claim 2, in which said emitter-follower transistor further includes a resistance (68 , 70) connected in the emitter circuit thereof and said output signals being derived across said resistance.
Claim 5
Dependent Claim
54 words
A logic circuit according to claim 1, in which said constant current source (50) provides a preselected current I and said output circuit comprises an emitter-follower transistor (66) having a resistance (64) connected in the emitter circuit thereof and said resistance has a resistance value selected to provide an output current of 1/2 I.
Claim 6
Dependent Claim
29 words
A logic circuit according to claim 1, in which said output circuit includes a resistance (76) connected between collectors of said differential amplifier transistors and said voltage source (52).
Claim 7
Dependent Claim
44 words
A logic circuit according to claim 5, in which said resistance (76) connected between said collectors and said voltage source is selected to have a value equal to 1/2 the value of a resistor (54) forming said constant current source for said differential amplifier.
Claim 8
Dependent Claim
36 words
A logic circuit according to claim 1, in which said output circuit includes a resistor (78) and an output transistor (66), said resistor being connected from the base of said output transistor to relative electrical ground.
Claim 9
Dependent Claim
44 words
A logic circuit according to claim 7, in which the value of said resistor (78) connected to said base of said output transistor is substantially 1/2 the value of the resistance of a resistor (54) forming said constant current source for said differential amplifier.
Claim 10
Dependent Claim
104 words
A logic circuit according to claim 1, in which said differential amplifier comprises four transistors (42, 80 and 44, 82) arranged into first and second pairs for receiving respective first and second pairs of input binary signals from said first and second input circuits, respectively, and in which said first and second pairs of binary input signals have a preselected relationship between high and low amplitudes thereof, and in which a second one of each of said first and second pairs of input signals is shifted relative to a first one of each pair by an amount equal to 1/2 said preselected amplitude difference.
Claim 11
Dependent Claim
83 words
A logic circuit according to claim 1, in which said differential amplifier comprises two groups of three transistors (42, 80, 44 and 88, 90, 92) each group forming a respective differential amplifier, the outputs of the two differential amplifiers being connected as inputs to a third transistor (44, 92) of each group and the other two transistors of each group being provided with respective input binary signals from said first and second input circuits, thereby providing a controlled input flip flop logic circuit.
Claim 12
Dependent Claim
35 words
A logic circuit according to claim 10, in which said output circuit has a level shifting resistor (68, 98) connected in the collector circuit of said third transistor of each of said two differential amplifiers.
Claim 13
Dependent Claim
37 words
A logic circuit according to claim 10, in which said output circuit comprises two output transistors (66, 94) and includes a level shifting resistor (64, 95) connected in the respective emitter circuit of said two output transistors.
Claim 14
Dependent Claim
60 words
A logic circuit according to claim 1, in which said second input circuit includes an additional transistor (82) having an emitter connected to said common emitters, a collector connected to said collector to which said output means is connected, and a base connected to one of said output signals from said output circuit, thereby forming a flip flop logic circuit.
Claim 15
Dependent Claim
79 words
A logic circuit according to claim 13, in which said differential amplifier comprises two groups of respective pairs of transistors (42, 80 and 44, 82) and said first input circuit provides two input signals connected to respective transistors of said first group and said second input circuits provides two input signals connected to respective transistors of said second group of transistors and said additional transistor is connected to receive one of said output signals as an input signal thereof.
Claim 16
Dependent Claim
28 words
A logic circuit according to claim 14, in which said output circuit comprises an output emitter-follower transistor having at least one resistor connected in the emitter circuit thereof.
Claim 17
Dependent Claim
26 words
A logic circuit according to claim 15, in which said output emitter-follower transistor includes two resistors in the emitter circuit thereof, thereby providing two output signals.
References Cited (Backward Citations)
No citation records indexed.
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