EP0164605A2
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EP
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Method of manufacturing nonvolatile semiconductor EEPROM device
Assignee: Toshiba Corp
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Filing: 1985-05-15
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Granted: —
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Expires: 2005-05-15
Abstract
Abstract A method of manufacturing a nonvolatile semiconductor memory device having a gate oxide layer (17) including a relatively thin silicon dioxide layer (20). This gate oxide layer (17) including the thin silicon dioxide layer (20) is formed by the steps of forming the gate oxide film (17) on a semiconductor element region in a silicon substrate (11); removing a portion of the gate oxide film (17) to expose a portion of the silicon substrate (11); implanting impurity ions in the exposed portion of the substrate (11) to an extent that a peak concentration of the impurity ions exceeds a solid solution limit at a temperature of the following thermal annealing step; activating the implanted impurity by thermal annealing so as to form a high impurity concentration layer (19) and thermally oxidizing a surface of the high impurity concentration layer (19) to form the thin silicon dioxide layer (20).
Inventors
- 👤 Naohiro C/O Patent Division Matsukawa
- 👤 Sigeru C/O Patent Division Morita
- 👤 Hiroshi C/O Patent Division Nozawa
Bibliographic Details
Application Number
—
Jurisdiction
EP
Data Source
google_patents
Last Synchronized
2026-11-02 23:32
CPC Classifications
H; H10; H10P; H10P30/00; H10P30/20; H10P30/21; H10D; H10D30/00; H10D30/01; H10D30/021; H10D30/0411; H10D30/60; H10D30/68; H10D30/681; H10D30/683; H10D64/00; H10D64/01; H10D64/031; H10D64/035; H10P30/202; H10P30/204; H10P30/28; Y; Y10; Y10S; Y10S148/00; Y10S148/082
Claims Analysis
Total Claims: 18
Claim 1
Independent Claim
202 words
A method of manufacturing a nonvolatile semiconductor memory device comprising the steps of: (i) forming an element isolation insulating film (15) on a surface of a silicon substrate (11) of a first conductivity type and forming an island element region isolated by said insulating film (15); (ii) forming a gate oxide film (17) including a relatively thin silicon dioxide film portion (20) in said element region by thermal oxidation; and (iii) forming a floating gate electrode at least on said silicon dioxide film portion (20), characterized in that the step (ii) of forming said gate oxide film (17) comprises the steps of: (a) forming said gate oxide film (17) on said element region; (b) removing a portion of said gate oxide film (17) to expose a portion of said silicon substrate (11), and implanting impurity ions in the exposed portion to an extent that a peak concentration thereof exceeds a solid solution limit at a temperature in the following thermal annealing step; (c) activating the implanted impurity by thermal annealing so as to form a high concentration impurity layer (19); and (d) thermally oxidizing a surface of said high concentration impurity layer so as to form a silicon dioxide thin film (20).
Claim 2
Independent Claim
202 words
A method of manufacturing a nonvolatile semiconductor memory device comprising the steps of: (i) forming an element isolation insulating film (15) on a surface of a silicon substrate (11) of a first conductivity type and forming an island element region isolated by said insulating film (15); (ii) forming a gate oxide film (17) including a relatively thin silicon dioxide film portion (20) in said element region by thermal oxidation; and (iii) forming a floating gate electrode at least on said silicon dioxide film portion (20), characterized in that the step (ii) of forming said gate oxide film (17) comprises the steps of: (a) forming said gate oxide film (17) on said element region; (b) removing a portion of said gate oxide film (17) to expose a portion of said silicon substrate (11), and implanting impurity ions in the exposed portion to an extent that a peak concentration thereof exceeds a solid solution limit at a temperature in the following thermal annealing step; (c) activating the implanted impurity by thermal annealing so as to form a high concentration impurity layer (19); and (d) thermally oxidizing a surface of said high concentration impurity layer so as to form a silicon dioxide thin film (20).
Claim 3
Dependent Claim
36 words
A method according to claim 1, characterized in that the ion-implantation in the step (b) is performed by ion-implanting an impurity or an impurity combination selected from the group consisting of arsenic, phosphorus, arsenic/phosphorus, and arsenic/boron.
Claim 4
Dependent Claim
34 words
A method according to claim 1, characterized in that the thermal annealing in the step (c) is performed in an oxygen atmosphere diluted with an inert gas such as argon, nitrogen or the like.
Claim 5
Dependent Claim
37 words
A method according to claim 1, characterized in that in the step (d), said silicon dioxide thin film (20) is formed in an oxygen atmosphere diluted with an inert gas such as argon, nitrogen or the like.
Claim 6
Dependent Claim
38 words
A method according to claim 1, characterized in that in the step (d), said silicon dioxide thin film (20) is formed in a water vapor atmosphere diluted with an inert gas such as argon, nitrogen or the like.
Claim 7
Dependent Claim
26 words
A method according to claim 1, characterized in that ion-implantation is performed in a channel region after forming the gate oxide film in the step (a).
Claim 8
Dependent Claim
25 words
A method according to claim 1, characterized in that the thermal annealing in the step (c) is performed at a temperature not lower than 400°C.
Claim 9
Dependent Claim
23 words
A method according to claim 7, characterized in that the thermal annealing in the step (c) is performed at a temperature of 900°C.
Claim 10
Dependent Claim
48 words
A method according to claim 1, characterized in that the ion-implantation in the-step (b) is performed to obtain an impurity concentration of 1 x 1019 cm -3 to 5 x 10 20 cm -3 in the high concentration impurity layer after the thermal annealing in the step (c).
Claim 11
Dependent Claim
46 words
A method according to claim 1, characterized in that the ion-implantation in the step (b) is performed using a combination of p-type and n-type impurities, and a difference in impurity carrier concentration thereof is set to be within + 1 x 10 14 cm -3 .
Claim 12
Dependent Claim
21 words
A method according to claim 1, characterized in that the ion-implantation in the step (b) is performed in a channel region.
Claim 13
Dependent Claim
33 words
A method according to claim 1, characterized in that the ion-implantation in the step (b) is performed in a portion of a drain region and a portion of a channel region adjacent thereto.
Claim 14
Dependent Claim
21 words
A method according to claim 1, characterized in that the ion-implantation in the step (b) is performed in a drain region.
Claim 15
Dependent Claim
16 words
A method according to claim 9, characterized in that ions to be implanted are arsenic ions.
Claim 16
Dependent Claim
35 words
A method according to claim 1, characterized in that the ion-implantation in the step (b) is performed so that the implanted impurity is partially precipitated as clusters at a temperature in the thermal annealing step.
Claim 17
Independent Claim
176 words
A method of manufacturing a nonvolatile semiconductor memory device comprising the steps of: (i) forming an element isolation insulating film (15) on a surface of a silicon substrate (11) of a first conductivity type and forming an island element region isolated by said insulating film (15); (ii) forming a gate oxide film (17) including a relatively thin silicon dioxide film portion (20) in said element region by thermal oxidation; and (iii) forming a floating gate electrode at least on said silicon dioxide film portion (20), characterized in that the step (ii) of forming said gate oxide film (17) comprises the steps of: (a) forming said gate oxide film (17) on said element region; (b) removing a portion of said gate oxide film (17) to expose a portion of said silicon substrate (11), and implanting impurity ions in the exposed portion to an extent that a peak concentration thereof ultimately exceeds a solid solution limit; and (c) thermally oxidizing a surface of said high concentration impurity layer so as to form a silicon dioxide thin film (20).
Claim 18
Independent Claim
176 words
A method of manufacturing a nonvolatile semiconductor memory device comprising the steps of: (i) forming an element isolation insulating film (15) on a surface of a silicon substrate (11) of a first conductivity type and forming an island element region isolated by said insulating film (15); (ii) forming a gate oxide film (17) including a relatively thin silicon dioxide film portion (20) in said element region by thermal oxidation; and (iii) forming a floating gate electrode at least on said silicon dioxide film portion (20), characterized in that the step (ii) of forming said gate oxide film (17) comprises the steps of: (a) forming said gate oxide film (17) on said element region; (b) removing a portion of said gate oxide film (17) to expose a portion of said silicon substrate (11), and implanting impurity ions in the exposed portion to an extent that a peak concentration thereof ultimately exceeds a solid solution limit; and (c) thermally oxidizing a surface of said high concentration impurity layer so as to form a silicon dioxide thin film (20).
References Cited (Backward Citations)
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