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EP0164418A1 Expired / Lapsed EP ⏱️ 0.0 years remaining

Microprogram control system

Assignee: Fujitsu Ltd
•
Filing: 1984-11-08
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Granted: —
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Expires: 2004-11-08
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Abstract

Abstract A microprogram controlling method is applied to an information processing apparatus in which a single instruction is developed in a multiflow manner and processed by pipelining in response to the microprogram control. With this method, the microinstruction is divided into a part to control a first stage of the pipelining and a part to control a first stage of the pipelining and a part to control a second and succeeding stage, and the part for controlling the first stage is simultaneously read out with the part for controlling a second stage and succeeding stages of the flow which immediately precedes the present flow. With this method, it is possible to control even the first stage of the pipelining with a microprogram, so that it is advantageously possible to form an information processing apparatus capable of pipelining which is flexible as compared with the conventional. To sum up, with this method, the field to control a first stage of the pipelining is separated from the field for controlling succeeding stages and is read out simultaneously with the timing at which is read out of the field to control succeeding stages in the flow which immediately precedes the present flow, thereby allowing even the first stage of the pipelining to be controlled by a microprogram.

Inventors

  • 👤 Toshiaki Kitamura
  • 👤 Katsumi Onishi
  • 👤 Yuji Oinaga

Bibliographic Details

Application Number —
Jurisdiction EP
Data Source google_patents
Last Synchronized 2026-10-25 18:41
CPC Classifications
G; G06; G06F; G06F9/00; G06F9/06; G06F9/30; G06F9/38; G06F9/3867; G06F9/22; G06F9/28

Claims Analysis

Total Claims: 5
Claim 1
Independent Claim 98 words
A microprogram control system in a data processing unit which develops an instruction into multi-flow by the microprogram control and processes each flow by the pipeline consisting of a plurality of stages, wherein the microinstruction is divided into the part for controlling the first stage of said pipeline and the part for controlling the second and successive stages and the part to be controlled by microprogram is extended by reading said part for controlling the first stage is read simultaneously with the part for controlling the second and successive stages of the flow just preceding the current flow.
Claim 2
Dependent Claim 98 words
A microprogram control system in a data processing unit which develops an instruction into multi-flow by the microprogram control and processes each flow by the pipeline consisting of a plurality of stages, wherein the microinstruction is divided into the part for controlling the first stage of said pipeline and the part for controlling the second and successive stages and the part to be controlled by microprogram is extended by reading said part for controlling the first stage is read simultaneously with the part for controlling the second and successive stages of the flow just preceding the current flow.
Claim 3
Dependent Claim 113 words
A microprogram control system according to claim .1 with the constitution that a first memory in which the field of microinstruction corresponding to said part controlling the first stage is stored and a second memory in which the field of microinstruction corresponding to said part controlling the second and successive stages are provided respectively, the address information for making access to said first memory is delayed as much as one stage and then access is made to said second memory, wherein the access to said first memory and the access to said second memory to be accesed with a delay as long as one stage are carried out in parallel on the timing.
Claim 4
Dependent Claim 97 words
; 3. A microprogram control system according to claim (2, wherein, regarding the memory which stores the fields of microinstructions corresponding to said part for controlling the second and successive stages, a second memory for the first flow which stores microinstructions for processings of the first flow among said multiple flows and a second memory for the second and successive flows which stores microinstructions regarding processings of the second and successive flows among said multiple flows are provided respectively, and the bit width of microinstructions to be stored in the respective second memories is different each other.
Claim 5
Dependent Claim 34 words
A microprogram control system according to claim 1, wherein the processing which controls the first stage corresponding to the first flow among the processings developed in said multiple flows is executed by hardware controls.

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