High voltage mos field effect transistor

Claim 1

A high voltage MOS transistor comprising; -a substrate of first conductivity type and having a first doping concentration; a first region of semiconductor material of second conductivity type and a second dopant concentration on the surface of said substrate; a third semiconductor region of said second conductivity type and a third dopant concentration much higher than said first and second dopant concentration disposed in said second semiconductor region on said major surface of said body, the periphery of said third semiconductor region being surrounded on the major surface of said body by said second semiconductor region; a thin fourth semiconductor region of secona conductivity type and third dopant concentration and spaced apart from said second and said third semiconductor regions; a thin dielectric layer on the surface of said body extending between said third semiconductor region and said fourth semiconductor region; a thin dielectric layer on the surface of said second semiconductor region; a gate electrode disposed on said dielectric layer extending between said second semiconductor region ana said fourth semiconductor region; Claim 1 (Continued) an insulating layer covering said gate electrode and the said tick dielectric layer; a conducting layer disposed on said insulating layer including a portion disposed over said first dielectric layer and a portion of the said thick dielectric region for acting as a field plate and reducing the electrical field in the said second semiconductor region and a second portion making physical and electrical contact with said fourth semiconductor region.