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EP0159931A1 Expired / Lapsed EP ⏱️ 0.0 years remaining

Process for making electrical isolation zones for components in an integrated circuit

Assignee: Individual
•
Filing: 1985-03-29
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Granted: —
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Expires: 2005-03-29
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Abstract

Abstract Translated from French Ce procédé consiste à réaliser un masque (4) sur un substrat en silicium (2) pour définir les emplacements des zones d'isolation à réaliser, à doper des régions (6) du substrat non masquées, à oxyder thermiquement lesdites régions du substrat, à réaliser une tranchée (10) dans chaque région oxydée (8) du substrat, et dans les régions du substrat situées au-dessous desdites régions oxydées, à oxyder thermiquement les bords des tranchées (10), à remplir les tranchées (10) par un diélectrique (14) isolant, et à éliminer le masque (4). This method consists in producing a mask (4) on a silicon substrate (2) to define the locations of the isolation zones to be produced, in doping non-masked regions (6) of the substrate, in thermally oxidizing said regions of the substrate, making a trench (10) in each oxidized region (8) of the substrate, and in the regions of the substrate located below said oxidized regions, thermally oxidizing the edges of the trenches (10), filling the trenches (10) with an insulating dielectric (14), and eliminating the mask (4).

Inventors

  • 👤 Daniel Bois

Bibliographic Details

Application Number —
Jurisdiction EP
Data Source google_patents
Last Synchronized 2026-11-01 04:54
CPC Classifications
H; H10; H10W; H10W10/00; H10W10/01; H10W10/011; H10W10/014; H10W10/0145; H10W10/0147; H10W10/041; H10W10/10; H10W10/17; H10W10/40; Y; Y10; Y10S; Y10S148/00; Y10S148/082

Claims Analysis

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References Cited (Backward Citations)

US3853633A Cited
EP0072966A2 Cited
EP0091507A2 Cited

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