EP0159179A2
Expired / Lapsed
EP
⏱️ 0.0 years remaining
Improved bipolar transistor construction
Assignee: Northrop Grumman Space and Mission Systems Corp
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Filing: 1985-04-11
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Granted: —
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Expires: 2005-04-11
Abstract
Abstract A bipolar transistor structure and process for its manufacture. The structure includes an emitter region formed over a base region, and a thin wall of insulating material, such as a thermal oxide, along the edge of the emitter region. The wall of insulating material electrically isolates emitter and base contact areas, and greatly reduces the size of inactive portions of the base region, thereby reducing the base resistance and base-collector capacitance, and increasing the speed of operation of the transistor. The wall of insulating material is formed by a process that eliminates at least one photolithographic patterning and etching operation found in conventional processes. In a preferred embodiment of the invention, the emitter region is shaped to include a wide inactive region and an active region of which a portion has reduced width. This configuration provides for lower emitter resistance, but maintains a relatively long active emitter perimeter, which keeps the base resistance also low.
Inventors
- 👤 Neal Frederick Gardner
Bibliographic Details
Application Number
—
Jurisdiction
EP
Data Source
google_patents
Last Synchronized
2026-11-03 04:57
CPC Classifications
H; H10; H10D; H10D10/00; H10D10/01; H10D10/051; H10D10/40; H10D10/441; H10D62/00; H10D62/10; H10D62/13; H10D62/133; H10D62/40; H10W; H10W20/00; H10W20/01; H10W20/031; H10W20/064; H10W20/069; H10W20/40; Y; Y10; Y10S; Y10S148/00; Y10S148/111
Claims Analysis
Total Claims: 33
Claim 1
Independent Claim
305 words
A process for bipolar transistor fabrication, comprising the steps of: forming a base region overlying a collector region in a semiconductor material, the base and collector materials having opposite conductivity types; forming an appropriately patterned emitter region overlapping the base region, of the same conductivity type as the collector region; forming a wall of insulating material on the base region and adjacent to the edges of the emitter region; and forming a conductive layer over the base and emitter regions but not over the wall of insulating material, whereby the conductive layer serves to establish separate electrical contacts with the base and emitter regions, and the wall of insulating material minimizes the size of inactive portions of the base region; wherein said steps of forming an appropriately patterned emitter region and forming a wall of insulating material include: forming an emitter layer over the base region; depositing an oxidation-masking film over the emitter layer; patterning and etching the emitter region in the oxidation-masking film and in the emitter layer, including undercutting the oxidation-masking film by a controlled amount; forming an insulating film over the surfaces of semiconductor materials but not over the oxidation masking film; etching the insulating film by a directionally preferential technique that leaves a wall of insulating material at the edges of the emitter region, beneath the undercut edges of the oxidation-masking film; and stripping the oxidation-masking film from the emitter region; and wherein the process further includes the step of forming an oxide layer over the emitter layer before said depositing step; and said step of undercutting the oxidation-masking film includes patterning and etching the oxidation masking film, etching the oxide layer from the emitter layer, with a desired degree of undercut beneath the oxidation-masking film, and etching the exposed emitter layer, whereby undercutting is achieved without prolonged exposure to etching.
Claim 2
Dependent Claim
305 words
A process for bipolar transistor fabrication, comprising the steps of: forming a base region overlying a collector region in a semiconductor material, the base and collector materials having opposite conductivity types; forming an appropriately patterned emitter region overlapping the base region, of the same conductivity type as the collector region; forming a wall of insulating material on the base region and adjacent to the edges of the emitter region; and forming a conductive layer over the base and emitter regions but not over the wall of insulating material, whereby the conductive layer serves to establish separate electrical contacts with the base and emitter regions, and the wall of insulating material minimizes the size of inactive portions of the base region; wherein said steps of forming an appropriately patterned emitter region and forming a wall of insulating material include: forming an emitter layer over the base region; depositing an oxidation-masking film over the emitter layer; patterning and etching the emitter region in the oxidation-masking film and in the emitter layer, including undercutting the oxidation-masking film by a controlled amount; forming an insulating film over the surfaces of semiconductor materials but not over the oxidation masking film; etching the insulating film by a directionally preferential technique that leaves a wall of insulating material at the edges of the emitter region, beneath the undercut edges of the oxidation-masking film; and stripping the oxidation-masking film from the emitter region; and wherein the process further includes the step of forming an oxide layer over the emitter layer before said depositing step; and said step of undercutting the oxidation-masking film includes patterning and etching the oxidation masking film, etching the oxide layer from the emitter layer, with a desired degree of undercut beneath the oxidation-masking film, and etching the exposed emitter layer, whereby undercutting is achieved without prolonged exposure to etching.
Claim 3
Dependent Claim
266 words
A process for bipolar transistor fabrication, comprising the steps of: forming a base region overlying a collector region in a semiconductor material, the base and collector materials having opposite conductivity types; forming an appropriately patterned emitter region overlapping the base region, of the same conductivity type as the collector region; forming a wall of insulating material on the base region and adjacent to the edges of the emitter region; and forming a conductive layer over the base and emitter regions but not over the wall of insulating material: whereby the conductive layer serves to establish separate electrical contacts with the base and emitter regions, and the wall of insulating material minimizes the size of inactive portions of the base region; wherein said steps of forming an appropriately patterned emitter region and forming a wall of insulating material include: forming an emitter layer over the base region; depositing an oxidation-masking film over the emitter layer; patterning and etching the emitter region in the oxidation-masking film and in the emitter layer, including undercutting the oxidation-masking film by a controlled amount; forming an insulating film over the surfaces of semiconductor materials but not over the oxidation masking film; etching the insulating film by a directionally preferential technique that leaves a wall of insulating material at the edges of the emitter region, beneath the undercut edges of the oxidation-masking film; and stripping the oxidation-masking film from the emitter region; and wherein the process further includes the step of: further doping portions of the base region not directly beneath the emitter region, to further reduce the base resistance of the transistor.
Claim 4
Dependent Claim
266 words
A process for bipolar transistor fabrication, comprising the steps of: forming a base region overlying a collector region in a semiconductor material, the base and collector materials having opposite conductivity types; forming an appropriately patterned emitter region overlapping the base region, of the same conductivity type as the collector region; forming a wall of insulating material on the base region and adjacent to the edges of the emitter region; and forming a conductive layer over the base and emitter regions but not over the wall of insulating material: whereby the conductive layer serves to establish separate electrical contacts with the base and emitter regions, and the wall of insulating material minimizes the size of inactive portions of the base region; wherein said steps of forming an appropriately patterned emitter region and forming a wall of insulating material include: forming an emitter layer over the base region; depositing an oxidation-masking film over the emitter layer; patterning and etching the emitter region in the oxidation-masking film and in the emitter layer, including undercutting the oxidation-masking film by a controlled amount; forming an insulating film over the surfaces of semiconductor materials but not over the oxidation masking film; etching the insulating film by a directionally preferential technique that leaves a wall of insulating material at the edges of the emitter region, beneath the undercut edges of the oxidation-masking film; and stripping the oxidation-masking film from the emitter region; and wherein the process further includes the step of: further doping portions of the base region not directly beneath the emitter region, to further reduce the base resistance of the transistor.
Claim 5
Dependent Claim
191 words
A process for bipolar transistor fabrication, comprising the steps of: forming a base region overlying a collector region in a semiconductor material, the base and collector materials having opposite conductivity types; forming an appropriately patterned emitter region overlapping the base region, of the same conductivity type as the collector region; forming a wall of insulating material on the base region and adjacent to the edges of the emitter region; and forming a conductive layer over the base and emitter regions but not over the wall of insulating material, whereby the conductive layer serves to establish separate electrical contacts with the base and emitter regions, and the wall of insulating material minimizes the size of inactive portions of the base region; wherein said steps of forming an appropriately patterned emitter region and forming a wall of insulating material include: forming an emitter layer over the base region: patterning and etching the emitter layer to define the emitter region; forming an insulating film over the base and emitter regions; and etching the insulating film by a directionally preferential technique that leaves a wall of insulating material at the edges of the emitter region.
Claim 6
Dependent Claim
191 words
A process for bipolar transistor fabrication, comprising the steps of: forming a base region overlying a collector region in a semiconductor material, the base and collector materials having opposite conductivity types; forming an appropriately patterned emitter region overlapping the base region, of the same conductivity type as the collector region; forming a wall of insulating material on the base region and adjacent to the edges of the emitter region; and forming a conductive layer over the base and emitter regions but not over the wall of insulating material, whereby the conductive layer serves to establish separate electrical contacts with the base and emitter regions, and the wall of insulating material minimizes the size of inactive portions of the base region; wherein said steps of forming an appropriately patterned emitter region and forming a wall of insulating material include: forming an emitter layer over the base region: patterning and etching the emitter layer to define the emitter region; forming an insulating film over the base and emitter regions; and etching the insulating film by a directionally preferential technique that leaves a wall of insulating material at the edges of the emitter region.
Claim 7
Dependent Claim
36 words
A process as set forth in claim 3, and further including the step of: further doping portions of the base region not directly beneath the emitter region, to further reduce the base resistance of the transistor.
Claim 8
Dependent Claim
293 words
A process for bipolar transistor fabrication, comprising the steps of: implanting a base region in a silicon semiconductor material, to form a base region over a collector region of opposite conductivity types; depositing an emitter layer over the base layer, of the same conductivity type as the collector region; depositing a film of silicon nitride over the emitter layer; ,. selectively etching the silicon nitride film and the emitter layer to define an emitter region, said selectively etching step including undercutting the edges of the silicon nitride film by a controlled amount; forming a thermal oxide film over the base region and at the edges of the emitter region, but not over the silicon nitride film; etching the thermal oxide film by a directionally preferential etching technique, to leave a wall of thermal oxide material at the edges of the emitter region, beneath the undercut edges of the silicon nitride film; stripping the remaining portions of the silicon nitride film from the emitter region; depositing a film of platinum over the entire device; sintering the platinum film to form platinum silicide layers over the emitter region and the base region, leaving unsintered platinum over the wall of oxide material; and etching away the unsintered platinum to expose the wall of oxide material, which electrically isolates the conductive platinum silicide on the emitter and base regions; wherein: the process further includes the step of forming an oxide layer over the emitter layer before said depositing step; and said step of undercutting the silicon nitride film includes first etching the oxide layer from the emitter layer, with a desired degree of undercut beneath the silicon nitride film, whereby the step of etching the emitter layer can proceed uniformly without prolonged etchant exposure to achieve undercutting.
Claim 9
Dependent Claim
293 words
A process for bipolar transistor fabrication, comprising the steps of: implanting a base region in a silicon semiconductor material, to form a base region over a collector region of opposite conductivity types; depositing an emitter layer over the base layer, of the same conductivity type as the collector region; depositing a film of silicon nitride over the emitter layer; ,. selectively etching the silicon nitride film and the emitter layer to define an emitter region, said selectively etching step including undercutting the edges of the silicon nitride film by a controlled amount; forming a thermal oxide film over the base region and at the edges of the emitter region, but not over the silicon nitride film; etching the thermal oxide film by a directionally preferential etching technique, to leave a wall of thermal oxide material at the edges of the emitter region, beneath the undercut edges of the silicon nitride film; stripping the remaining portions of the silicon nitride film from the emitter region; depositing a film of platinum over the entire device; sintering the platinum film to form platinum silicide layers over the emitter region and the base region, leaving unsintered platinum over the wall of oxide material; and etching away the unsintered platinum to expose the wall of oxide material, which electrically isolates the conductive platinum silicide on the emitter and base regions; wherein: the process further includes the step of forming an oxide layer over the emitter layer before said depositing step; and said step of undercutting the silicon nitride film includes first etching the oxide layer from the emitter layer, with a desired degree of undercut beneath the silicon nitride film, whereby the step of etching the emitter layer can proceed uniformly without prolonged etchant exposure to achieve undercutting.
Claim 10
Dependent Claim
164 words
A process for bipolar transistor fabrication, comprising the steps of: implanting a base region in a silicon semiconductor material, to form a base region over a collector region of opposite conductivity types; N1 depositing an emitter layer over the base layer, of the same conductivity type as the collector region; selectively etching the emitter layer to define an emitter region; forming a thermal oxide film over the base region and at the edges of the emitter region; etching the thermal oxide film by a directionally preferential etching technique, to leave a wall of thermal oxide material at the edges of the emitter region; depositing a film of platinum over the entire device; sintering the platinum film to form platinum silicide layers over the emitter region and the base region, leaving unsintered platinum over the wall of oxide material: and etching away the unsintered platinum to expose the wall of oxide material, which electrically isolates the conductive platinum silicide on the emitter and base regions.
Claim 11
Dependent Claim
164 words
A process for bipolar transistor fabrication, comprising the steps of: implanting a base region in a silicon semiconductor material, to form a base region over a collector region of opposite conductivity types; N1 depositing an emitter layer over the base layer, of the same conductivity type as the collector region; selectively etching the emitter layer to define an emitter region; forming a thermal oxide film over the base region and at the edges of the emitter region; etching the thermal oxide film by a directionally preferential etching technique, to leave a wall of thermal oxide material at the edges of the emitter region; depositing a film of platinum over the entire device; sintering the platinum film to form platinum silicide layers over the emitter region and the base region, leaving unsintered platinum over the wall of oxide material: and etching away the unsintered platinum to expose the wall of oxide material, which electrically isolates the conductive platinum silicide on the emitter and base regions.
Claim 12
Dependent Claim
36 words
A process as set forth in claim 6, and further including the step of: further doping portions of the base region not directly beneath the emitter region, to further reduce the base resistance of the transistor.
Claim 13
Dependent Claim
248 words
A bipolar transistor construction, comprising: a collector region formed from a semiconductor material having a first conductivity type; a base region formed over said collector region, from a semiconductor material having the opposite conductivity type to that of the collector region; an emitter region formed to overlap a selected mid-portion of said base region, from a semiconductor material of the same conductivity type as said collector region; a wall of insulating material formed on said base region in contact with the edges of said emitter region and having a height approximately equal to the thickness of said emitter region; and a conductive layer formed over said base region and said emitter region but not over said wall of insulating material, said conductive layer serving to establish separate connections to said base region and said emitter region; whereby said wall of insulating material electrically separates the separate connections to said base and emitter regions and reduces the size of inactive portions of said base region, thereby decreasing base resistance and base-collector capacitance, and increasing speed and device packing density; and wherein said emitter region has a relatively wide inactive portion, not overlapping said base region, and an adjoining inactive portion with a first area that is of substantially the same width as the inactive portion, to provide a relatively low emitter resistance, and a contiguous second area that is narrower than the first area and provides a relatively long active emitter perimeter and therefore a relatively low base resistance.
Claim 14
Dependent Claim
248 words
A bipolar transistor construction, comprising: a collector region formed from a semiconductor material having a first conductivity type; a base region formed over said collector region, from a semiconductor material having the opposite conductivity type to that of the collector region; an emitter region formed to overlap a selected mid-portion of said base region, from a semiconductor material of the same conductivity type as said collector region; a wall of insulating material formed on said base region in contact with the edges of said emitter region and having a height approximately equal to the thickness of said emitter region; and a conductive layer formed over said base region and said emitter region but not over said wall of insulating material, said conductive layer serving to establish separate connections to said base region and said emitter region; whereby said wall of insulating material electrically separates the separate connections to said base and emitter regions and reduces the size of inactive portions of said base region, thereby decreasing base resistance and base-collector capacitance, and increasing speed and device packing density; and wherein said emitter region has a relatively wide inactive portion, not overlapping said base region, and an adjoining inactive portion with a first area that is of substantially the same width as the inactive portion, to provide a relatively low emitter resistance, and a contiguous second area that is narrower than the first area and provides a relatively long active emitter perimeter and therefore a relatively low base resistance.
Claim 15
Dependent Claim
25 words
A bipolar transistor construction as set forth in claim 8, wherein: said wall of insulating material has a thickness of approximately 0.2 to 0.5 microns.
Claim 16
Dependent Claim
49 words
A bipolar transistor construction as set forth in claim 8, wherein: said collector and base regions are of appropriately doped silicon materials; said emitter region is of polysilicon or semi-insulating polysilicon material; said wall of insulating material is of silicon dioxide; and said conductive layer is of platinum silicide.
Claim 17
Dependent Claim
39 words
A bipolar transistor construction as set forth in claim 8, and further including: a thin-film metallization layer having electrically separate portions formed in overlapping contact with said conductive layer, to establish electrical contact with said base and emitter regions.
Claim 18
Dependent Claim
196 words
A process for bipolar transistor fabrication, comprising the steps of: forming a base region overlying a collector region in a semiconductor material, the base and collector materials having opposite conductivity types; forming an appropriately patterned emitter region overlapping the base region, of the same conductivity type as the collector region; forming a wall of insulating material on the base region and adjacent to the edges of the emitter region; and forming a conductive layer over the base and emitter regions but not over the wall of insulating material, whereby the conductive layer serves to establish separate electrical contacts with the base and emitter regions, and the wall of insulating material minimizes the size of inactive portions of the base region; and wherein said step of forming an appropriately patterned emitter region includes forming a wide inactive emitter portion not overlapping the base region, and forming an active emitter region that has a first area contiguous with and approximately as wide as the inactive portion, to provide a relatively low emitter resistance, and a second area adjoining the first, but being narrower to provide a relatively long active emitter perimeter and therefore a relatively low base resistance.
Claim 19
Dependent Claim
196 words
A process for bipolar transistor fabrication, comprising the steps of: forming a base region overlying a collector region in a semiconductor material, the base and collector materials having opposite conductivity types; forming an appropriately patterned emitter region overlapping the base region, of the same conductivity type as the collector region; forming a wall of insulating material on the base region and adjacent to the edges of the emitter region; and forming a conductive layer over the base and emitter regions but not over the wall of insulating material, whereby the conductive layer serves to establish separate electrical contacts with the base and emitter regions, and the wall of insulating material minimizes the size of inactive portions of the base region; and wherein said step of forming an appropriately patterned emitter region includes forming a wide inactive emitter portion not overlapping the base region, and forming an active emitter region that has a first area contiguous with and approximately as wide as the inactive portion, to provide a relatively low emitter resistance, and a second area adjoining the first, but being narrower to provide a relatively long active emitter perimeter and therefore a relatively low base resistance.
Claim 20
Dependent Claim
122 words
A process as set forth in claim 12, wherein said steps of forming an appropriately patterned emitter region and forming a wall of insulating material include: forming an emitter layer over the base region; depositing an oxidation-masking film over the emitter layer; patterning and etching the emitter region in the oxidation-masking film and in the emitter layer, undercutting the oxidation-masking film by a controlled amount; forming an insulating film over the surfaces of semiconductor materials but not over the oxidation masking film; etching the insulating film by a directionally preferential technique that leaves a wall of insulating material at the edges of the emitter region, beneath the undercut edges of the oxidation-masking film; and stripping the oxidation-masking film from the emitter region.
Claim 21
Dependent Claim
44 words
A process as set forth in claim 13, and further including the step of: forming a protective film between the base region and the emitter layer, to prevent inadvertent removal of base region material during said step of patterning and etching the emitter region.
Claim 22
Dependent Claim
77 words
A process as set forth in claim 13, wherein: the process further includes the step of forming an oxide layer over the emitter layer before said depositing step; and s-aid step of undercutting the oxidation-masking film includes - patterning and etching the oxidation-masking film, etching the oxide layer from the emitter layer, with a desired degree of undercut beneath the oxidation-masking film, and etching the exposed emitter layer, whereby undercutting is achieved without prolonged exposure to etching.
Claim 23
Dependent Claim
36 words
A process as set forth in claim 13, and further including the step of: further doping portions of the base region not directly beneath the emitter region, to further reduce the base resistance of the transistor.
Claim 24
Dependent Claim
79 words
A process as set forth in claim 12, wherein said steps of forming an appropriately patterned emitter region and forming a wall of insulating material include: forming an emitter layer over the base region; patterning and etching the emitter layer to define the emitter region; forming an insulating film over the base and emitter regions; and etching the insulating film by a directionally preferential technique that leaves a wall of insulating material at the edges of the emitter region.
Claim 25
Dependent Claim
38 words
1 8. A process as set forth in claim 17, and further including the step of: further doping portions of the base region not directly beneath the emitter region, to further reduce the base resistance of the transistor.
Claim 26
Dependent Claim
301 words
A process for bipolar transistor fabrication, comprising the steps of: implanting a base region in a silicon semiconductor material, to form a base region over a collector region of opposite conductivity types; depositing an emitter layer over the base layer, of the same conductivity type as the collector region; depositing a film of silicon nitride over the emitter layer; selectively etching the silicon nitride film and the emitter layer to define an emitter region, said selectively etching step including undercutting the edges of the silicon nitride film by a controlled amount; forming a thermal oxide film over the base region and at the edges of the emitter region, but not over the silicon nitride film; etching the thermal oxide film by a directionally preferential etching technique, to leave a wall of thermal oxide material at the edges of the emitter region, beneath the undercut edges of the silicon nitride film; stripping the remaining portions of the silicon nitride film from the emitter region; depositing a film of platinum over the entire device; sintering the platinum film to form platinum silicide layers over the emitter region and the base region, leaving unsintered platinum over the wall of oxide material; and etching away the unsintered platinum to expose the wall of oxide material, which electrically isolates the conductive platinum silicide on the emitter and base regions; and wherein said step of selectively etching to define the emitter region includes forming a wide inactive emitter portion not overlapping the base region, and forming an active emitter region that has a first area contiguous with and approximately as wide as the inactive portion, to provide a relatively low emitter resistance, and a second area adjoining the first, but being narrower to provide a relatively long active emitter perimeter and therefore a relatively low base resistance.
Claim 27
Dependent Claim
301 words
A process for bipolar transistor fabrication, comprising the steps of: implanting a base region in a silicon semiconductor material, to form a base region over a collector region of opposite conductivity types; depositing an emitter layer over the base layer, of the same conductivity type as the collector region; depositing a film of silicon nitride over the emitter layer; selectively etching the silicon nitride film and the emitter layer to define an emitter region, said selectively etching step including undercutting the edges of the silicon nitride film by a controlled amount; forming a thermal oxide film over the base region and at the edges of the emitter region, but not over the silicon nitride film; etching the thermal oxide film by a directionally preferential etching technique, to leave a wall of thermal oxide material at the edges of the emitter region, beneath the undercut edges of the silicon nitride film; stripping the remaining portions of the silicon nitride film from the emitter region; depositing a film of platinum over the entire device; sintering the platinum film to form platinum silicide layers over the emitter region and the base region, leaving unsintered platinum over the wall of oxide material; and etching away the unsintered platinum to expose the wall of oxide material, which electrically isolates the conductive platinum silicide on the emitter and base regions; and wherein said step of selectively etching to define the emitter region includes forming a wide inactive emitter portion not overlapping the base region, and forming an active emitter region that has a first area contiguous with and approximately as wide as the inactive portion, to provide a relatively low emitter resistance, and a second area adjoining the first, but being narrower to provide a relatively long active emitter perimeter and therefore a relatively low base resistance.
Claim 28
Dependent Claim
76 words
A process as set forth in claim 19, wherein: the process further includes the step of forming an oxide layer over the emitter layer before said depositing step; and said step of undercutting the silicon nitride film includes first etching the oxide layer from the emitter layer, with a desired degree of undercut beneath the silicon nitride film, whereby the step of etching the emitter layer can proceed uniformly without prolonged etchant exposure to achieve undercutting.
Claim 29
Dependent Claim
43 words
A process as set forth in claim 19, and further including the step of: forming a protective film between the base region and the emitter layer, to prevent inadvertent removal of base region material during said step of selectively etching the emitter region.
Claim 30
Dependent Claim
37 words
A process as set forth in claim 19 , and further including the step of: further doping portions of the base region not directly beneath the emitter region, to further reduce the base resistance of the transistor.
Claim 31
Dependent Claim
240 words
A process for bipolar transistor fabrication, comprising the steps of: implanting a base region in a silicon semiconductor material, to form a base region over a collector region of opposite conductivity types; depositing an emitter layer over the base layer, of the same conductivity type as the collector region; selectively etching the emitter layer to define an emitter region; forming a thermal oxide film over the base region and at the edges of the emitter region; etching the thermal oxide film by a directionally preferential etching technique, to leave a wall of thermal oxide material at the edges of the emitter region; depositing a film of platinum over the entire device; sintering the platinum film to form platinum silicide layers over the emitter region and the base region, leaving unsintered platinum over the wall of oxide material; and etching away the unsintered platinum to expose the wall of oxide material, which electrically isolates the conductive platinum silicide on the emitter and base regions; and wherein said step of selectively etching to define the emitter region includes forming a wide inactive emitter portion not overlapping the base region, and forming an active emitter region that has a first area contiguous with and approximately as wide as the inactive portion, to provide a relatively low emitter resistance, and a second area adjoining the first, but being narrower to provide a relatively long active emitter_ perimeter and therefore a relatively low base resistance.
Claim 32
Dependent Claim
240 words
A process for bipolar transistor fabrication, comprising the steps of: implanting a base region in a silicon semiconductor material, to form a base region over a collector region of opposite conductivity types; depositing an emitter layer over the base layer, of the same conductivity type as the collector region; selectively etching the emitter layer to define an emitter region; forming a thermal oxide film over the base region and at the edges of the emitter region; etching the thermal oxide film by a directionally preferential etching technique, to leave a wall of thermal oxide material at the edges of the emitter region; depositing a film of platinum over the entire device; sintering the platinum film to form platinum silicide layers over the emitter region and the base region, leaving unsintered platinum over the wall of oxide material; and etching away the unsintered platinum to expose the wall of oxide material, which electrically isolates the conductive platinum silicide on the emitter and base regions; and wherein said step of selectively etching to define the emitter region includes forming a wide inactive emitter portion not overlapping the base region, and forming an active emitter region that has a first area contiguous with and approximately as wide as the inactive portion, to provide a relatively low emitter resistance, and a second area adjoining the first, but being narrower to provide a relatively long active emitter_ perimeter and therefore a relatively low base resistance.
Claim 33
Dependent Claim
36 words
A process as set forth in claim 23, and further including the step of: further doping portions of the base region not directly beneath the emitter region, to further reduce the base resistance of the transistor.
References Cited (Backward Citations)
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