EP0157660A2
Expired / Lapsed
EP
⏱️ 0.0 years remaining
MOS imaging device with monochrome-color compatibility and signal readout versatility
Assignee: Fairchild Semiconductor Corp
•
Filing: 1985-02-14
•
Granted: —
•
Expires: 2005-02-14
Abstract
Abstract A monochrome or color imager having interlaced, non-interlaced or pseudo-interlaced readout utilizing pixels arranged in groups forming equilateral triangles which are interleaved. Separate shift registers driven by different clock signals are located on each side of the rectangular array and are coupled to alternating row address lines and different groups of column lines in the array. The clock signals driving each shift register can be controlled to select monochrome or color operation in one of the above noted modes of readout.
Inventors
- 👤 Cheng-Wei Chen
Bibliographic Details
Application Number
—
Jurisdiction
EP
Data Source
google_patents
Last Synchronized
2026-10-26 17:09
CPC Classifications
H; H10; H10F; H10F39/00; H10F39/10; H10F39/12; H10F39/18; H10F39/182; H04; H04N; H04N23/00; H04N23/80; H04N23/84; H04N25/00; H04N25/70; H04N25/76; H10F39/80; H10F39/811
Claims Analysis
Total Claims: 21
Claim 1
Independent Claim
65 words
An imaging device having monochrome and color outputs and an array of rows and columns of pixels; and characterized by: a first addressing circuit for activating selected ones of said rows at selected times; a second addressing circuit for activating selected ones of said rows at selected times; and means for sequentially connecting said columns to either said monochrome or said color output as selected.
Claim 2
Dependent Claim
65 words
An imaging device having monochrome and color outputs and an array of rows and columns of pixels; and characterized by: a first addressing circuit for activating selected ones of said rows at selected times; a second addressing circuit for activating selected ones of said rows at selected times; and means for sequentially connecting said columns to either said monochrome or said color output as selected.
Claim 3
Dependent Claim
86 words
An apparatus as defined in Claim 1 characterized in that said array consists of a plurality of pixels where each pixel consists of a PN junction photodiode having its anode coupled through the channel region of an MOS transistor to a selected one of a plurality of video signal lines each of which is connected to all the pixels in one column of said array, and wherein each said transistor in each row of pixels has its gate connected to an address line for that row.
Claim 4
Dependent Claim
27 words
An apparatus as defined in Claim 2 characterized in that said first addressing circuit is connected to every other one of the address lines in said array.
Claim 5
Dependent Claim
32 words
An apparatus as defined in Claim 3 characterized in that said second addressing circuit is connected to the other of said address lines which are not coupled to said first addressing circuit.
Claim 6
Dependent Claim
21 words
An apparatus as defined in Claim 3 or 4 characterized in that said first addressing circuit is a two-phase shift register.
Claim 7
Dependent Claim
19 words
An apparatus as defined in Claim 4 characterized in that said second addressing circuit is a two-phase shift register.
Claim 8
Independent Claim
92 words
An apparatus as defined in any of Claims 1 to 6 wherein said means for sequentially connecting is comprised of: a horizontal shift register having a plurality of outputs which are sequentially activated as a signal propagates through said shift register; a plurality of MOS transistors having their gates coupled to said horizontal shift register outputs, a first group of which transistors couple selected ones of said video signal lines to said monochrome output and a second group of which couple selected ones of the video signal lines to said color outputs.
Claim 9
Dependent Claim
57 words
The apparatus of Claim 7 characterized in that said first . group of transistors comprises a plurality of pairs of transistors each pair having their gates connected to one of the outputs of said horizontal shift register and wherein each transistor of each pair couples a monochrome output to a different one of the video signal lines.
Claim 10
Dependent Claim
72 words
An apparatus as defined in Claim 7 or 8 characterized in that said second group of transistors comprises a plurality of trios of transistors comprises a plurality of trios of transistors wherein, within each trio, the gates of each transistor are coupled to one of the outputs of said horizontal shift register, and wherein each transistor of each pair couples a color output to a different one of the video signal lines.
Claim 11
Independent Claim
70 words
A method of reading video signal data from an array of pixels in a video area imaging device having odd and even row address lines and column signal lines coupled to each pixel characterized by the steps of: sequentially coupling pairs of said column signal lines to a pair of monochrome outputs; and preventing the sequential coupling of trios of said column signal lines to a trio of color outputs.
Claim 12
Independent Claim
70 words
A method of reading video signal data from an array of pixels in a video area imaging device having odd and even row address lines and column signal lines coupled to each pixel characterized by the steps of: sequentially coupling pairs of said column signal lines to a pair of monochrome outputs; and preventing the sequential coupling of trios of said column signal lines to a trio of color outputs.
Claim 13
Dependent Claim
19 words
The method of Claim 10 characterized by the step of: activating sequentially each row address line in said array.
Claim 14
Dependent Claim
31 words
The method of Claim 11 characterized in that two shift registers sequentially activate half the row address lines in said array such that each row address line is activated in sequence.
Claim 15
Independent Claim
50 words
The method of any of Claims 10 to 12 characterized in that said row address lines are divided into even and odd row address lines and are interlaced in even-odd-even-odd manner and wherein all the even row address lines are activated and then all the odd row lines are activated.
Claim 16
Dependent Claim
41 words
The method of Claim 13 characterized in that two shift registers activate the row address lines with one shift register first activating all the even row address lines and the other shift register then activates all the odd row address lines.
Claim 17
Dependent Claim
17 words
The method of Claim 10 wherein the even and odd row address lines are simultaneously, sequentially activated.
Claim 18
Dependent Claim
21 words
The method of Claim 15 wherein two shift registers simultaneously, sequentially activate each of the even and odd row address lines.
Claim 19
Independent Claim
70 words
A method of reading video signal data from an array of pixels in a video area imaging device having odd and even row address lines and column signal lines coupled to each pixel comprising the steps of: - sequentially coupling selected trios of said column signal lines to a trio of color outputs; preventing the sequential coupling of pairs of said column signal lines to a pair of monochrome outputs.
Claim 20
Independent Claim
70 words
A method of reading video signal data from an array of pixels in a video area imaging device having odd and even row address lines and column signal lines coupled to each pixel comprising the steps of: - sequentially coupling selected trios of said column signal lines to a trio of color outputs; preventing the sequential coupling of pairs of said column signal lines to a pair of monochrome outputs.
Claim 21
Dependent Claim
35 words
The method of Claim 17 further comprising the step of sequentially activating both said odd and even row address lines simultaneously in pairs until all the odd and even row address lines have been activated.
References Cited (Backward Citations)
No citation records indexed.
USPTO Annuity & Maintenance Windows
Maintenance schedule is calculated for granted US utility patents.