EP0147857A2
Expired / Lapsed
EP
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Parallel data processing system
Assignee: Hitachi Ltd
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Filing: 1984-12-27
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Granted: —
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Expires: 2004-12-27
Abstract
Abstract A parallel data processing system comprising a control means (3-11, a plurality of processing means (3-2) controlled by said control means and adapted to perform parallel data processing, memory means provided correspondingly to said processing means and adapted to store data for corresponding processing means, and ring bus means (3-3) connecting said memory means in a ring configuration so that data is shifted along the ring bus. Each of the processing means performs data processing based on data transferred to the corresponding memory means.
Inventors
- 👤 Hitoshi Matsushima
- 👤 Hirotada Ueda
Bibliographic Details
Application Number
—
Jurisdiction
EP
Data Source
google_patents
Last Synchronized
2026-10-31 10:54
CPC Classifications
G; G06; G06T; G06T1/00; G06T1/20; G06F; G06F15/00; G06F15/76; G06F15/80; G06F15/8007; G06F15/8015
Claims Analysis
Total Claims: 15
Claim 1
Independent Claim
90 words
A parallel data processing system comprising: control means (3-1); a plurality of processors (3-2) performing processes specified by said control means; and ring bus means (3-3) including a plurality of memory means (3-4) provided in correspondence to said processors and adapted to transfer data with corresponding processors, and data shift means (3-5) connecting said memory means in a ring configuration and operating to transfer data stored in said memory means along said data shift means, said processors performing respective processes by making reference to data transferred to corresponding memory means.
Claim 2
Dependent Claim
90 words
A parallel data processing system comprising: control means (3-1); a plurality of processors (3-2) performing processes specified by said control means; and ring bus means (3-3) including a plurality of memory means (3-4) provided in correspondence to said processors and adapted to transfer data with corresponding processors, and data shift means (3-5) connecting said memory means in a ring configuration and operating to transfer data stored in said memory means along said data shift means, said processors performing respective processes by making reference to data transferred to corresponding memory means.
Claim 3
Dependent Claim
30 words
A system according to claim 1, wherein said shift means comprises means (3-6) for controlling the number of shift operations in accordance with a command issued by said control means.
Claim 4
Dependent Claim
45 words
A system according to claim 1, wherein said plurality of memory means comprises means (6-5) for controlling as to which one of data from said corresponding processors or data from adjoining memory means is to be stored in accordance with an indication from corresponding processors.
Claim 5
Dependent Claim
41 words
A system according to claim 1, wherein said plurality of processors are given addresses, and wherein said processors are controlled so that they are inhibited from using, for processing, data transferred from corresponding processors based on addresses given to said processors.
Claim 6
Dependent Claim
19 words
A system according to claim 4, wherein addresses given to said processors are set up by said control means.
Claim 7
Dependent Claim
24 words
A system according to claim 1, wherein said ring bus means operates to transfer data in said plurality of memory means in one direction.
Claim 8
Dependent Claim
24 words
A system according to claim 1, wherein said ring bus means operates to transfer data in said plurality of memory means in both directions.
Claim 9
Dependent Claim
34 words
A system according to claim 1, wherein said control means performs control such that data in 2-dimensional arrangement is partitioned into a plurality of 2-dimensional data arrays and supplied to said processors for processing.
Claim 10
Dependent Claim
41 words
A system according to claim 8, wherein said control means partitions said 2-dimensional data into 2-dimensional data arrays of J in number of rows and I in number of columns, so that each partitioned data array is processed by a processor.
Claim 11
Dependent Claim
34 words
A system according to claim 9, wherein said control means indicates the number of shift operations of said shift means based on the number of rows J and number of columns I of partitioning.
Claim 12
Dependent Claim
71 words
A system according to claim 8, wherein said shift means comprises register means (5-1), and wherein said control means operates on said memory means by indicating the address of said register means to store the number of shift operations for transacting data to said register means corresponding to processors processing adjoining partitioned 2-dimensional data array basing on the number of rows J and columns I of partitioning of said 2-dimensional data.
Claim 13
Dependent Claim
25 words
A system according to claim 11, wherein said register means stores values defined by the number of shift operations: 1, I (J-1), IJ-1 and J.
Claim 14
Dependent Claim
19 words
A system according to claim 8, wherein said partitioned 2-dimensional data arrays include marginal portions overlapping with each other.
Claim 15
Dependent Claim
14 words
A system according to claim 8, wherein said 2- dimensional data comprises image data.
References Cited (Backward Citations)
No citation records indexed.
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