Patent US5293885A successfully refreshed from Google Patents.
EP0147230A2
Expired / Lapsed
EP
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Subscriber line interface circuit having an impedance synthesizer
Assignee: NEC Corp
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Filing: 1984-12-27
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Granted: —
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Expires: 2004-12-27
Abstract
Abstract A subscriber line interface circuit discribed wherein a pair of line terminals are connected to a subscriber loop and a pair of output terminals are connected to a telecommunication exchange. A first amplifier is provided having a first pair of input terminals coupled to the line terminals and a second pair of input terminals. The first amplifier has a unity gain over a path from the input terminals of the first pair to said output terminals and a gain K over a path from the terminals of the second pair to said output terminals. A pair of reference resistors are cross-coupled from said output terminals to the line terminals, each of the reference resistors having a resistance Ro. A second amplifier is connected from the line terminals to the terminals of the second pair, the second amplifier having a transfer function―Ro/K.Zt, where Zt is an impedance to be synthesized across the line terminals.
Inventors
- 👤 Hideyuki C/O Nec Corp. Hirata
Bibliographic Details
Application Number
—
Jurisdiction
EP
Data Source
google_patents
Last Synchronized
2026-11-01 21:32
CPC Classifications
H; H03; H03F; H03F1/00; H03F1/42; H03F1/48; A; A61; A61J; A61J1/00; A61J1/14; A61J1/1412; A61J1/1425; H04; H04M; H04M19/00; H04M19/001; H04M19/005
Claims Analysis
Total Claims: 9
Claim 1
Independent Claim
154 words
A subscriber line interface circuit having a pair of line terminals adapted to be connected to a subscriber line and a pair of output terminals adapted to be connected to a telecommunication exchange, comprising: a first amplifier having a first pair of input terminals coupled to said line terminals, a second pair of input terminals, said first amplifier having a unity gain over a path from the input terminals of said first pair to said output terminals and a gain K over a path from the terminals of said second pair to said output terminals; a pair of reference resistors connected from said output terminals to said line terminals, each of said reference resistors having a resistance Ro; and a second amplifier connected from said line terminals to the terminals of said second pair, said second amplifier having a transfer function -Ro/K-Zt, where Zt is an impedance to be synthesized across said line terminals.
Claim 2
Dependent Claim
154 words
A subscriber line interface circuit having a pair of line terminals adapted to be connected to a subscriber line and a pair of output terminals adapted to be connected to a telecommunication exchange, comprising: a first amplifier having a first pair of input terminals coupled to said line terminals, a second pair of input terminals, said first amplifier having a unity gain over a path from the input terminals of said first pair to said output terminals and a gain K over a path from the terminals of said second pair to said output terminals; a pair of reference resistors connected from said output terminals to said line terminals, each of said reference resistors having a resistance Ro; and a second amplifier connected from said line terminals to the terminals of said second pair, said second amplifier having a transfer function -Ro/K-Zt, where Zt is an impedance to be synthesized across said line terminals.
Claim 3
Dependent Claim
24 words
A suscriber line interface circuit as claimed in claim 1, wherein said reference resistors are cross-coupled from said output terminals to said line terminals.
Claim 4
Dependent Claim
19 words
A subscriber line interface circuit as claimed in claim 1, wherein said first amplifier comprises a single operational amplifier.
Claim 5
Dependent Claim
49 words
A subscriber line interface circuit as claimed in claim 3, wherein said first amplifier comprises a resistor network and wherein said operational amplifier is provided with a pair of input terminals and a pair of output terminals which are connected with said resistor network in a balanced circuit configuration.
Claim 6
Dependent Claim
44 words
A subscriber line interface circuit as claimed in claim 1, wherein said second amplifier comprises a resistor network and an operational amplifier having a pair of input terminals and an output terminal which are connected with said resistor network in an unbalanced circuit configuration.
Claim 7
Dependent Claim
49 words
A subscriber line interface circuit as claimed in claim 5, wherein said second amplifier further comprises means coupled to be responsive to the output of said operational amplifier to generate a pair of signals of opposite polarities and applying the signals to the input terminals of said second pair.
Claim 8
Dependent Claim
115 words
A subscriber line interface circuit as claimed in claim 5, wherein said second amplifier further comprises: high-pass filter means coupled to the output of said operational amplifier for passing a higher frequency component of the signal in said subscriber line; low-pass filter means coupled to the output of said operational amplifier for passing a lower frequency component of said signal in said subscriber line; first impedance means having the impedance Zt connected to the output of said high-pass filter means; second impedance means having a resistance value 2 x Rf, where Rf is a resistance to be synthesized across said line terminals; and means for summing the outputs of said first and second impedance means.
Claim 9
Dependent Claim
44 words
A subscriber line interface circuit as claimed in claim 7, further comprising a pair of current mirror circuits responsive to an output signal from said summing means and applying output signals of the current mirror circuits to the input terminals of said second pair.
References Cited (Backward Citations)
No citation records indexed.
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