A method for fabricating a dielectric-isolated integrated circuit device

Abstract

Abstract @ A method for fabricating a wafer for a dielectric isolation integrated circuit device is provided, wherein a substrate of the wafer, comprises portions of polycrystalline silicon (16) positioned underneath regions for electrical elements, namely, "islands" (17), and portions (19) of single crystal silicon positioned in other areas of the wafer such as scribing regions (18), a peripheral region and contact regions for the substrate. The single crystal portions (19) of the substrate are grown during the fabricating steps thereof by exposing surfaces of an original substrate of single crystal silicon, before the deposition of silicon on the original substrate, by removing a dielectric isolation layer (14) over the predetermined regions to be exposed. The single crystal silicon portions of the wafer provide various advantages for subsequent mechanical processing of the wafer such as shaping and rounding the peripheral region and scribing the wafer into dice.

Inventors

• 👤 Tamotsu Ishikawa
• 👤 Hirokazu Tanaka
• 👤 Akira Tabata

Bibliographic Details