§
Luxuse
Patent Intelligence
Sign In
← Back to Patent Explorer
EP0138579A2 Expired / Lapsed EP ⏱️ 0.0 years remaining

Signal processor for matrix arrays

Assignee: BAE Systems PLC
•
Filing: 1984-10-11
•
Granted: —
•
Expires: 2004-10-11
📄 Original PDF 🌐 Google Patents 🔄 Sync Now

Abstract

Abstract Matrix arrays, in particular infra-red arrays, suffer from non-uniformity in output from the individual elements in the array. This is due to each element in the array having for example, its own characteristic responsivity and leakage current, and is seen in the array output as a pattern of offset values. These offset values must be removed from the output of the array if useful digital information is to be obtained. One known method of doing this is to show the array a black body at a known uniform temperature and use the output from the array to cancel the offset values. However, the dynamic range of the system is directly related to the range of offset values obtained and also to the size of the digitiser. Large-size digitisers have relatively slow sampling rates and in order to have a higher sampling rate, a small-size digitiser must be used. The signal processing system described herein corrects for offset values and is able to provide a high sampling rate by using a small-size digitiser.

Inventors

  • 👤 David Thomas British Aerospace Plc Whinray
  • 👤 Gwilym John Britsh Aerospace Plc Tilsley

Bibliographic Details

Application Number —
Jurisdiction EP
Data Source google_patents
Last Synchronized 2026-10-26 02:34
CPC Classifications
H; H04; H04N; H04N25/00; H04N25/60; H04N25/63; H04N5/00; H04N5/30; H04N5/33

Claims Analysis

Total Claims: 6
Claim 1
Independent Claim 158 words
A signal processing system, for use with a matrix array in which the individual, addressed elements have differing characteristics resulting in each element having an offset value producing non-uniformity in the output of the array, including an N-bit analog-to-digital converting means for accepting successive analog input signals during processing, adding means, and storage means, the adding means being arranged to sum a digital output from the analog-to-digital converting means and an output from the storage means, the summed value being passed into the storage means, an M-bit digital-to-analog converting means, where M > N, for converting the output from the storage means to an analog signal which is subsequently summed with the input via inverting means, whereby successive inputs from an addressed element are summed and fed back for subtraction from the input prior to the analog-to-digital converting means so that the output from each addressed element can be processed to effect cancellation of the respective offset values.
Claim 2
Dependent Claim 158 words
A signal processing system, for use with a matrix array in which the individual, addressed elements have differing characteristics resulting in each element having an offset value producing non-uniformity in the output of the array, including an N-bit analog-to-digital converting means for accepting successive analog input signals during processing, adding means, and storage means, the adding means being arranged to sum a digital output from the analog-to-digital converting means and an output from the storage means, the summed value being passed into the storage means, an M-bit digital-to-analog converting means, where M > N, for converting the output from the storage means to an analog signal which is subsequently summed with the input via inverting means, whereby successive inputs from an addressed element are summed and fed back for subtraction from the input prior to the analog-to-digital converting means so that the output from each addressed element can be processed to effect cancellation of the respective offset values.
Claim 3
Dependent Claim 34 words
A system according to claim 1, wherein dividing means are included between the analog-to-digital converting means and the adding means to provide an integration time constant which determines the decay rate of the system.
Claim 4
Dependent Claim 14 words
A system according to claim 2, wherein the dividing means has a fixed value.
Claim 5
Dependent Claim 14 words
A system according to claim 2, wherein the dividing means has a variable value.
Claim 6
Independent Claim 25 words
A system according to any one of claims 1 to 4, wherein N has the value of 8 and M has the value of 12.

References Cited (Backward Citations)

No citation records indexed.

USPTO Annuity & Maintenance Windows

Maintenance schedule is calculated for granted US utility patents.

Assigned Categories & Tags

No categories assigned to this patent yet.

Assign Category Tag