Apparatus for transcribing digital data

Claim 2

Apparatus for transcribing digital data wherein first digital words containing a first number of bits are assigned code patterns chosen from a plurality of second digital words containing a larger second number of bits, characterized in that a.) at least some of the first digital words are assigned at least two alternative code patterns which have an opposite characteristic; b.) first means (104, 126) are provided for receiving the plurality of first digital words and operable to produce second digital words corresponding to the assigned code patterns; and c.) second means (106, 107, 108, 140) are provided which are connected to the first means (104, 126) to test the second digital words and to cause an alternative code pattern for a word to appear in the output upon the occurrence of a predetermined condition.

Claim 3

Apparatus according to claim 1, characterized in that the bits of the second digital words are high and low D.C. values and the predetermined condition is a D.C. value produced by an excess number of one of the bit values in a word, that the opposite characteristic is an opposite D.C. value produced by an equal excess number of the other of the bit values in a word and that the second means (106, 107, 108, 140) selects an alternative code pattern for the word to reduce the D.C. value.

Claim 4

Apparatus according to claim 1, characterized in that the predetermined condition is the existence of a single bit at the start of any second digital word followed by a bit of opposite sense, and preceded by a bit at the end of a word having the opposite sense and that the second means (106, 107, 108, 140) selects an alternative code pattern for the word so that it has a starting bit of the opposite sense.

Claim 5

Apparatus for use in changing a plurality of 4 bit binary words into 8 bit binary patterns, characterized by a predetermined assignment arrangement which includes alternate 8 bit binary patterns for those having an unequal number of "0"'s and "1"'s, the alternate patterns having the same inequality in "0"'s and "1"'s but in the opposite sense with said apparatus comprising: first means (106) for receiving the 4 bit words, determining the assigned 8 bit binary pattern and producing a first output signal (109) if the assigned 8 bit binary pattern has an unequal number of "0"'s or "1"'s; and second means (126) for receiving the 4 bit words and connected to the first means to receive the first output signal, the second means operable to produce a second output (150) representing the 8 bit binary pattern assigned to the 4 bit word and choosing the pattern and its alternate in accordance with the first output signal to hold the overall number of "0"'s and "1"'s in successive words to substantial equality.

Claim 6

Apparatus for use in changing a plurality of 4 bit binary words into 8 bit binary patterns, characterized by a predetermined assignment arrangement which includes alternate 8 bit binary patterns for those having an unequal number of "0"'s and "1"'s, the alternate patterns having the same inequality in "0"'s and "1"'s but in the opposite sense with said apparatus comprising: first means (106) for receiving the 4 bit words, determining the assigned 8 bit binary pattern and producing a first output signal (109) if the assigned 8 bit binary pattern has an unequal number of "0"'s or "1"'s; and second means (126) for receiving the 4 bit words and connected to the first means to receive the first output signal, the second means operable to produce a second output (150) representing the 8 bit binary pattern assigned to the 4 bit word and choosing the pattern and its alternate in accordance with the first output signal to hold the overall number of "0"'s and "1"'s in successive words to substantial equality.

Claim 7

Apparatus according to claim 4, characterized by a bistable device (108) connected to the first means (106) and operable to produce a change of state signal (112) upon the occurrence of the first signal, whereat said second means (126) is connected to the bistable device to receive the change of state signal and to choose the 8 bit pattern and its alternate in accordance with the state of the bistable device.

Claim 8

Apparatus according to claim 5, characterized by a 5 bit memory (104) having a first input (102) connected to receive the 4 bit word, a second input (114) connected to receive the change of state signal, whereat the second means (126) is connected to the 5 bit memory (104) to receive the 4 bit signal and the change of state signal a predetermined time after the first means (106) receives the 4 bit word during which predetermined time period the first means (106) receives at least the first bit of the next successive 4 bit word and produces a third signal (130) indicative of the sense of such first bit with the second means (126) receiving the third signal and choosing the 8 bit pattern and its alternate in accordance therewith to prevent the occurrence of a single bit between "0" and "1" transitions between the end bit of the chosen 8 bit pattern and the beginning bit of the next successive 8 bit pattern.

Claim 9

Apparatus according to claim 6, characterized by an 8 bit memory (140) connected to receive the second output (150) and to hold the 8 bit word thereon for a second predetermined time period during which second predetermined time period the sense of the last bit of the previous word is determined and produced as a fourth output (144, 146) by the 8 bit memory, with the second means (126) receiving the fourth output and choosing the 8 bit pattern and any alternates in accordance therewith to prevent the occurrence of a single bit between "0" and "1" transitions between the first bit of the last successive 8 bit word and the end bit of the present 8 bit word and with the 8 bit memory (140) releasing the 8 bit word after the second predetermined time period as a fifth output (152).

Claim 10

Apparatus for use in transcribing a series of digital 4 bit words into a tape recorder, characterized by : first means (106) operable to receive the series of 4 bit words and to select an 8 bit word to represent it, the 8 bit word being chosen from a predetermined group, some of which have a D.C. weight of +4 but, in such event, an alternate 8 bit word is provided having a D.C. weight of -4; and second means (107, 108, 104, 126) operable to alternately select 8 bit words of D.C. weight of +4 and -4 so that the overall average is substantially zero.

Claim 11

Apparatus for use in transcribing a series of digital 4 bit words into a tape recorder, characterized by : first means (106) operable to receive the series of 4 bit words and to select an 8 bit word to represent it, the 8 bit word being chosen from a predetermined group, some of which have a D.C. weight of +4 but, in such event, an alternate 8 bit word is provided having a D.C. weight of -4; and second means (107, 108, 104, 126) operable to alternately select 8 bit words of D.C. weight of +4 and -4 so that the overall average is substantially zero.

Claim 12

Apparatus according to claim 8, characterized in that at least one 8 bit word has a D.C. weight of +8 and an alternate form has a D.C. weight of -8 and that said second means (107, 108, 104, 126) also alternately selects words of D.C. weight of +8 and D.C. weight of -8 except when a word having a D.C. weight of +8 is followed by a word having a D.C. weight of +4 in which event the second means interrupts such alternation after that word having the D.C. weight of +4 and then resumes alternating after the following word having any D.C. weight.

Claim 13

Apparatus according to claim 9, characterized in that the second means includes a flip flop (108) that normally changes state upon the occurrence of a word having any D.C. weight and includes a logic circuit (300 - 314) which detects the presence of a word having a D.C. weight of +8 followed by a word having a D.C. weight of +4 after which the logic circuit inhibits the flip flop for one state change.

Claim 14

Apparatus according to claim 8, characterized by third means (140) to determine the D.C. weight of the first bit of the next word ahead in the series and the D.C. weight of the last bit of the next word behind in the series and which operates to cause the second means (126) to select an 8 bit word that starts and ends with bits of D.C. weight such that in the series there will always be at least two bits of the same D.C. weight side by side.

Claim 15

Apparatus according to claim 1, characterized in that the predetermined condition is the existence of a single bit at the end of any second digital word preceded by a bit of opposite sense, followed by a bit at the start of a word having the opposite sense and the second means (106, 107, 108, 140) selects an alternative code pattern for the word so that it has an ending bit of the opposite sense.