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EP0137992A2 Expired / Lapsed EP ⏱️ 0.0 years remaining

Lateral bipolar transistor formed in a silicon on insulator (SOI) substrate

Assignee: Fujitsu Ltd
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Filing: 1984-08-28
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Granted: —
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Expires: 2004-08-28
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Abstract

Abstract A lateral bipolar transistor formed on a silicon on insulator (SOI) substrate, having a base electrode of heat resistive polycrystalline silicon of first conductivity type, formed on a base region of first conductivity type, all the bottom plane of the transistor region is in contact with the insulating layer of the SOI substrate. The base electrode is extended laterally over a part of a collector region to provide a relatively large base electrode width, which allows a small width of the base region, enhancing the current amplification factor of the transistor. The base region has a vertical doping profile which has a minimum value between the base electrode and the insulator layer of the substrate, reducing the recombination of carriers in the base region. Fabricating methods utilizing self-alignment-diffusion process are provided.

Inventors

  • 👤 Motoo Nakano

Bibliographic Details

Application Number —
Jurisdiction EP
Data Source google_patents
Last Synchronized 2026-11-01 15:55
CPC Classifications
H; H10; H10D; H10D62/00; H10D62/10; H10D62/17; H10D62/177; H10D62/184; H10D30/00; H10D30/60; H10D10/00; H10D10/311

Claims Analysis

Total Claims: 17
Claim 1
Independent Claim 162 words
A lateral bipolar transistor formed in a silicon layer (16) on an insulator (SOI) substrate comprising: a base region (13) of a first conductivity type formed in said silicon layer ; an emitter region (12) of a second conductivity type which is opposite to said first conductivity type, said emitter region being formed in said silicon layer and sharing a junction with said base region; a collector region (14) of said second conductivity type, formed in said silicon layer, and being positioned at the opposite side of said base region to said emitter region, said collector region sharing a junction with said base region; and an base electrode of a semiconductor of said first conductivity type formed on said base region, said base electrode sharing an boundary with said base region, being insulated electrically from said emitter region and collector region, said base region, said emitter region and said collector region being in surface-to-surface zontact with said underlying insulator of said substrate.
Claim 2
Dependent Claim 162 words
A lateral bipolar transistor formed in a silicon layer (16) on an insulator (SOI) substrate comprising: a base region (13) of a first conductivity type formed in said silicon layer ; an emitter region (12) of a second conductivity type which is opposite to said first conductivity type, said emitter region being formed in said silicon layer and sharing a junction with said base region; a collector region (14) of said second conductivity type, formed in said silicon layer, and being positioned at the opposite side of said base region to said emitter region, said collector region sharing a junction with said base region; and an base electrode of a semiconductor of said first conductivity type formed on said base region, said base electrode sharing an boundary with said base region, being insulated electrically from said emitter region and collector region, said base region, said emitter region and said collector region being in surface-to-surface zontact with said underlying insulator of said substrate.
Claim 3
Dependent Claim 51 words
A lateral bipolar transistor of claim 1, wherein, in the direction vertical to the surface of said substrate, the concentration distribution of dopants of said first conductivity type contained in said base region has a concave profile with a minimum value at a portion between said base electrode and said insulator.
Claim 4
Dependent Claim 52 words
A bipolar lateral transistor of claim 1, wherein, in the direction vertical to the surface of said substrate, the concentration distribution of said dopants of the first conductivity contained in said base region has a monotonously declining profile with a minimum value at the boundary between said base region and said insulator.
Claim 5
Dependent Claim 76 words
A bipolar lateral transistor of claim 1, 2 or 3, wherein said collector region includes a first collector region (14) and a second collector region (18), said first collector region is more lightly doped than said second region, said first collector region contacts said base electrode (15), and the concentration of the dopants contained in said base electrode is higher than the concentration of the dopants contained in said base region and said first collector region.
Claim 6
Dependent Claim 32 words
A bipolar lateral transistor of claim 1, 2, 3 or 4, wherein the width of said base electrode (15) is equal to or wider than the width of said base region (13).
Claim 7
Dependent Claim 22 words
A bipolar lateral transistor of claim 1, 2, 3 or 4, wherein said base electrode (15) is of heat resistive semiconductor material.
Claim 8
Dependent Claim 24 words
A bipolar lateral transistor of claim 6, wherein the material of said base electrode is selected from polycrystalline silicon, molybdenum silicide and tungsten silicide.
Claim 9
Dependent Claim 34 words
A bipolar lateral transistor of claim 1, 2, 3 or 4, wherein the side wall of said base electrode is covered by a narrow layer (17) (a rail) of insulator having a specified width.
Claim 10
Independent Claim 385 words
A method for fabricating a bipolar lateral transistor, comprising the steps of: forming a field oxide layer to define a transistor region of monocrystal silicon on said insulator formed on said substrate; doping lightly said transistor region uniformly with dopants of first conductivity type; forming a polycrystalline silicon layer covering the entire surface of the substrate; forming a silicon nitride (Si 3 n 4 ) layer over said polycrystalline silicon layer; forming a narrow base electrode across said transistor region, utilizing a patterning method; forming an insulating layer covering the entire surface of the substrate; removing said insulating layer by an anisotropic etching method leaving an insulator rail covering the side wall of said base electrode; implanting selectively dopants of first conductivity type into a portion of said monocrystal silicon region of first conductivity type with a light dose, positioning at the one side of said base electrode, utilizing said insulator rail and said remained silicon nitride layer atop said base electrode as a mask; diffusing said implanted dopants to form a diffusion region of first conductivity, said diffusion region vertically reaching said insulating layer of said substrate at the entire bottom plane and laterally extending to a plane positioning underneath said base electrode; implanting dopants of second conductivity type with a high dose into said diffusion region of first conductivity type and a portion of said monocrystal silicon region of second conductivity type, said portion positioning at the another side of said base electrode, utilizing said insulator rail and remained said silicon nitride layer atop said base electrode as a mask; diffusing said dopants implanted at the preceding step to form diffusion regions of second conductivity type whose bottom plane reaching said insulating layer of said substrate, whose side walls reaching predetermined positions underneath said insulator rail; removing said silicon nitride layer atop said base electrode to expose said polycrystalline silicon layer; implanting dopants of first conductivity type with a high dose into said polycrystalline silicon layer of said base electrode; and diffusing said dopants implanted into said base electrode to form a diffusion region reaching the boundary to underlying said diffusion region of first conductivity type and said diffusion region of second conductivity type, said diffusion layer in said base electrode forming a junction with said underlying diffusion region of second conductivity type.
Claim 11
Independent Claim 385 words
A method for fabricating a bipolar lateral transistor, comprising the steps of: forming a field oxide layer to define a transistor region of monocrystal silicon on said insulator formed on said substrate; doping lightly said transistor region uniformly with dopants of first conductivity type; forming a polycrystalline silicon layer covering the entire surface of the substrate; forming a silicon nitride (Si 3 n 4 ) layer over said polycrystalline silicon layer; forming a narrow base electrode across said transistor region, utilizing a patterning method; forming an insulating layer covering the entire surface of the substrate; removing said insulating layer by an anisotropic etching method leaving an insulator rail covering the side wall of said base electrode; implanting selectively dopants of first conductivity type into a portion of said monocrystal silicon region of first conductivity type with a light dose, positioning at the one side of said base electrode, utilizing said insulator rail and said remained silicon nitride layer atop said base electrode as a mask; diffusing said implanted dopants to form a diffusion region of first conductivity, said diffusion region vertically reaching said insulating layer of said substrate at the entire bottom plane and laterally extending to a plane positioning underneath said base electrode; implanting dopants of second conductivity type with a high dose into said diffusion region of first conductivity type and a portion of said monocrystal silicon region of second conductivity type, said portion positioning at the another side of said base electrode, utilizing said insulator rail and remained said silicon nitride layer atop said base electrode as a mask; diffusing said dopants implanted at the preceding step to form diffusion regions of second conductivity type whose bottom plane reaching said insulating layer of said substrate, whose side walls reaching predetermined positions underneath said insulator rail; removing said silicon nitride layer atop said base electrode to expose said polycrystalline silicon layer; implanting dopants of first conductivity type with a high dose into said polycrystalline silicon layer of said base electrode; and diffusing said dopants implanted into said base electrode to form a diffusion region reaching the boundary to underlying said diffusion region of first conductivity type and said diffusion region of second conductivity type, said diffusion layer in said base electrode forming a junction with said underlying diffusion region of second conductivity type.
Claim 12
Independent Claim 381 words
A method for fabricating a bipolar lateral transistor, comprising the steps of: forming a field oxide layer to define a transistor region of monocrystal silicon on said insulator layer formed on said substrate; doping lightly said transistor region uniformly with dopants of second conductivity type; forming a polycrystalline silicon layer covering the entire surface of the substrate; forming a silicon nitride (Si 3 n 4 ) layer over said polycrystalline silicon layer; forming a narrow base electrode across said transistor region, utilizing a patterning method; implanting selectively dopants of first conductivity type with a light dose into a portion of said monocrystal silicon region of second conductivity type, positioning at the one side of said base electrode, utilizing said base electrode and remained said silicon nitride layer atop said base electrode as a mask; diffusing said implanted dopants to form a diffusion region of first conductivity, said diffusion region vertically reaching said insulating layer of said substrate and laterally extending to a plane positioning underneath said base electrode; forming an insulating layer covering the entire surface of said substrate; removing said insulating layer by an anisotropic etching method leaving a insulator rail covering the side wall of said base electrode; implanting dopants of second conductivity type with a high dose into said diffusion region of first conductivity type and a portion of said monocrystal silicon region of second conductivity type, said portion positioning at the another side of said base electrode, utilizing said insulator rail and remained said silicon nitride layer atop said base electrode as a mask; diffusing said dopants implanted at the preceding step to form diffusion regions of second conductivity type whose bottom planes reaching said insulating layer of said substrate, whose side walls reaching predetermined positions underneath said insulator rail; removing said silicon nitride layer atop said base electrode to expose said polycrystalline silicon layer; implanting dopants of first conductivity type with a high dose into said polycrystalline silicon layer of said base electrode; and diffusing said dopants implanted into said base electrode to form a diffusion region reaching the boundary to underlying said diffusion region of first conductivity type and said diffusion region of second conductivity type, said diffusion layer in said base electrode forming a junction with said underlying diffusion region of second conductivity type.
Claim 13
Independent Claim 381 words
A method for fabricating a bipolar lateral transistor, comprising the steps of: forming a field oxide layer to define a transistor region of monocrystal silicon on said insulator layer formed on said substrate; doping lightly said transistor region uniformly with dopants of second conductivity type; forming a polycrystalline silicon layer covering the entire surface of the substrate; forming a silicon nitride (Si 3 n 4 ) layer over said polycrystalline silicon layer; forming a narrow base electrode across said transistor region, utilizing a patterning method; implanting selectively dopants of first conductivity type with a light dose into a portion of said monocrystal silicon region of second conductivity type, positioning at the one side of said base electrode, utilizing said base electrode and remained said silicon nitride layer atop said base electrode as a mask; diffusing said implanted dopants to form a diffusion region of first conductivity, said diffusion region vertically reaching said insulating layer of said substrate and laterally extending to a plane positioning underneath said base electrode; forming an insulating layer covering the entire surface of said substrate; removing said insulating layer by an anisotropic etching method leaving a insulator rail covering the side wall of said base electrode; implanting dopants of second conductivity type with a high dose into said diffusion region of first conductivity type and a portion of said monocrystal silicon region of second conductivity type, said portion positioning at the another side of said base electrode, utilizing said insulator rail and remained said silicon nitride layer atop said base electrode as a mask; diffusing said dopants implanted at the preceding step to form diffusion regions of second conductivity type whose bottom planes reaching said insulating layer of said substrate, whose side walls reaching predetermined positions underneath said insulator rail; removing said silicon nitride layer atop said base electrode to expose said polycrystalline silicon layer; implanting dopants of first conductivity type with a high dose into said polycrystalline silicon layer of said base electrode; and diffusing said dopants implanted into said base electrode to form a diffusion region reaching the boundary to underlying said diffusion region of first conductivity type and said diffusion region of second conductivity type, said diffusion layer in said base electrode forming a junction with said underlying diffusion region of second conductivity type.
Claim 14
Dependent Claim 199 words
ll., A method for fabricating a bipolar lateral transistor, comprising the steps of: forming a transistor region of monocrystal silicon of first conductivity type on a insulator layer formed on a substrate; forming a polycrystalline silicon layer covering the entire surface of the substrate; forming a silicon nitride (Si 3 n 4 ) layer over said polycrystalline silicon layer; forming a base electrode utilizing a conventional patterning method; forming a insulating layer covering the entire surface of the substrate; removing said insulating layer by an anisotropic etching method leaving a insulator rail covering the side wall of said base electrode; doping selected portion of said monocrystal silicon region of first conductivity type with dopants of second conductivity type, utilizing said insulator rail and remained said silicon nitride layer atop said base electrode as a mask; diffusing said implanted dopants to form the emitter region and collector region; removing said silicon nitride layer atop said base electrode to expose said polycrystalline silicon layer; implanting dopants of first conductivity type into said polycrystalline silicon layer of said base electrode; and diffusing said dopants implanted into said polycrystalline silicon layer to reach the boundary plane to said insulating layer of said substrate.
Claim 15
Dependent Claim 199 words
ll., A method for fabricating a bipolar lateral transistor, comprising the steps of: forming a transistor region of monocrystal silicon of first conductivity type on a insulator layer formed on a substrate; forming a polycrystalline silicon layer covering the entire surface of the substrate; forming a silicon nitride (Si 3 n 4 ) layer over said polycrystalline silicon layer; forming a base electrode utilizing a conventional patterning method; forming a insulating layer covering the entire surface of the substrate; removing said insulating layer by an anisotropic etching method leaving a insulator rail covering the side wall of said base electrode; doping selected portion of said monocrystal silicon region of first conductivity type with dopants of second conductivity type, utilizing said insulator rail and remained said silicon nitride layer atop said base electrode as a mask; diffusing said implanted dopants to form the emitter region and collector region; removing said silicon nitride layer atop said base electrode to expose said polycrystalline silicon layer; implanting dopants of first conductivity type into said polycrystalline silicon layer of said base electrode; and diffusing said dopants implanted into said polycrystalline silicon layer to reach the boundary plane to said insulating layer of said substrate.
Claim 16
Independent Claim 232 words
A method for fabricating a bipolar lateral transistor, comprising the steps of: forming a transistor region of monocrystal silicon of first conductivity type on a insulator layer formed on a substrate; implanting dopants of first conductivity type with a high dose into said transistor region so as to concentrate nighly at a portion nearby saia boundary D etween said transistor region and said insulator layer; forming a polycrystalline silicon layer covering the entire surface of the substrate; forming a silicon nitride (Si 3 N 4 ) layer over said polycrystalline silicon layer; forming a base electrode utilizing a conventional patterning method; forming a insulating layer covering the entire surface of the substrate; removing said insulating layer by an anisotropic etching method leaving a insulator rail covering the side wall of said base electrode; doping selected portion of said monocrystal silicon region of first conductivity type with dopants of second conductivity type, utilizing said insulator rail and remained said silicon nitride layer atop said base electrode as a mask; diffusing said implanted dopants to form the emitter region and collector region; removing said silicon nitride layer atop said base electrode to expose said polycrystalline silicon layer; implanting dopants of first conductivity type into said polycrystalline silicon layer of said base electrode; and diffusing said dopants implanted into said polycrystalline silicon layer to reach the boundary plane to said insulating layer of said substrate.
Claim 17
Independent Claim 232 words
A method for fabricating a bipolar lateral transistor, comprising the steps of: forming a transistor region of monocrystal silicon of first conductivity type on a insulator layer formed on a substrate; implanting dopants of first conductivity type with a high dose into said transistor region so as to concentrate nighly at a portion nearby saia boundary D etween said transistor region and said insulator layer; forming a polycrystalline silicon layer covering the entire surface of the substrate; forming a silicon nitride (Si 3 N 4 ) layer over said polycrystalline silicon layer; forming a base electrode utilizing a conventional patterning method; forming a insulating layer covering the entire surface of the substrate; removing said insulating layer by an anisotropic etching method leaving a insulator rail covering the side wall of said base electrode; doping selected portion of said monocrystal silicon region of first conductivity type with dopants of second conductivity type, utilizing said insulator rail and remained said silicon nitride layer atop said base electrode as a mask; diffusing said implanted dopants to form the emitter region and collector region; removing said silicon nitride layer atop said base electrode to expose said polycrystalline silicon layer; implanting dopants of first conductivity type into said polycrystalline silicon layer of said base electrode; and diffusing said dopants implanted into said polycrystalline silicon layer to reach the boundary plane to said insulating layer of said substrate.

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