EP0135274A2
Expired / Lapsed
EP
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Digital-to-analog converter
Assignee: Northrop Grumman Space and Mission Systems Corp
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Filing: 1984-07-10
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Granted: —
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Expires: 2004-07-10
Abstract
Abstract A digital-to-analog converter well suited for fabrication in monolithic form, in which lower-order bits of the input are converted by means of binary-weighted current switches, and higher-order bits of the input are converted by means of a thermometer-type decoder and current segment switches. Specifically, the converter includes a digital input register, a second register to receive the lower-order bits of the input, a set of binary-weighted current switches to generate an analog signal component proportional to the lower-order bits of the input, a thermometer-type decode to decode the higher-order bits of the input, and a set of identical current segment switches to generate an analog signal component proportional to the higher-order bits of the input. Importantly, there is also a third register between the decoder and the identical current segment switches, to insure that the current-weighted switches and the identical current segment switches are actuated simultaneously to minimize output transients.
Inventors
- 👤 Dennis John Packard
Bibliographic Details
Application Number
—
Jurisdiction
EP
Data Source
google_patents
Last Synchronized
2026-11-07 12:28
CPC Classifications
H; H03; H03M; H03M1/00; H03M1/06; H03M1/0617; H03M1/0624; H03M1/66; H03M1/68; H03M1/687; H03M1/74; H03M1/80
Claims Analysis
Total Claims: 9
Claim 1
Independent Claim
242 words
A digital-to-analog converter, comprising: a reference voltage source; a first register having a plurality n of binary stages for holding a binary-coded input quantity; thermometer decoding means for receiving a plurality m of consecutive bits from the most significant end of said first register and producing binary output signals on 2 -1 output lines in a thermometer code indicative of the m most significant bits of the input quantity; a second register having a plurality (n-m) of binary stages for holding a set of (n-m) consecutive bits from the least significant end of said first register; a third register having 2 M-1 binary stages for holding binary signals output from said thermometer decoding means; a plurality of 2 m- 1 identical current sources coupled to said voltage reference; a plurality of 2 m- 1 current segment switches connected to receive current from said identical current sources, to receive switching signals from said third register, and to conduct current to an analog output terminal; a plurality of (n-m) current sources coupled to said voltage reference to provide binary weighting; and a plurality of (n-m) current-weighted switches connected to receive current from said (n-m) weighted current sources, to receive switching signals from said second register, and to conduct current to said analog output terminal; whereby the converter of the invention keeps output glitch energy low by the use of current segment switches for the most significant bits of the input quantity to be converted.
Claim 2
Dependent Claim
242 words
A digital-to-analog converter, comprising: a reference voltage source; a first register having a plurality n of binary stages for holding a binary-coded input quantity; thermometer decoding means for receiving a plurality m of consecutive bits from the most significant end of said first register and producing binary output signals on 2 -1 output lines in a thermometer code indicative of the m most significant bits of the input quantity; a second register having a plurality (n-m) of binary stages for holding a set of (n-m) consecutive bits from the least significant end of said first register; a third register having 2 M-1 binary stages for holding binary signals output from said thermometer decoding means; a plurality of 2 m- 1 identical current sources coupled to said voltage reference; a plurality of 2 m- 1 current segment switches connected to receive current from said identical current sources, to receive switching signals from said third register, and to conduct current to an analog output terminal; a plurality of (n-m) current sources coupled to said voltage reference to provide binary weighting; and a plurality of (n-m) current-weighted switches connected to receive current from said (n-m) weighted current sources, to receive switching signals from said second register, and to conduct current to said analog output terminal; whereby the converter of the invention keeps output glitch energy low by the use of current segment switches for the most significant bits of the input quantity to be converted.
Claim 3
Dependent Claim
32 words
A digital-to-analog converter as set forth in claim 1, wherein: said second and third registers are clocked together to provide control signals to said current segment switches and said current-weighted switches simultaneously.
Claim 4
Dependent Claim
43 words
A digital-to-analog converter as set forth in claim 1, wherein: said current segment switches include pairs of complementary transistors switchable by complementary signals from said decoder; and said current-weighted switches include pairs of complementary transistors switchable by complementary signals from said second register.
Claim 5
Dependent Claim
32 words
A digital-to-analog converter as set forth in claim 3, wherein: said identical current sources include a plurality 2 -1 of transistors and an equal plurality of identical resistors connected in a network.
Claim 6
Dependent Claim
34 words
A digital-to-analog converter as set forth in claim 3, wherein: said binary-weighted current sources include a plurality (n-m) of transistors and an equal plurality of resistors of binarily increasing values connected in a network.
Claim 7
Dependent Claim
227 words
A digital-to-analog converter, comprising: a reference voltage source; thermometer decoding means for receiving a plurality m of consecutive and most significant bits from a plurality n of binary input signals, and producing binary output signals on 2 m- 1 output lines in a thermometer code indicative of the m most significant bits of the input quantity; a first register having a plurality (n-m) of binary stages for holding a set of (n-m) consecutive and least significant bits of the binary input signal; a second register having 2 m- 1 binary stages for holding binary signals output from said thermometer decoding means; a plurality of 2 -1 identical current sources coupled to said voltage reference; a plurality of 2 -1 current segment switches connected to receive current from said identical current sources, to receive switching signals from said second register, and to conduct current to an analog output terminal; a plurality of (n-m) current sources coupled to said voltage reference to provide binary weighting; and a plurality of (n-m) current-weighted switches connected to receive current from said (n-m) weighted current sources, to receive switching signals from said first register, and to conduct current to said analog output terminal; whereby the converter of the invention keeps output glitch energy low by the use of current segment switches for the most significant bits of the input quantity to be converted.
Claim 8
Dependent Claim
227 words
A digital-to-analog converter, comprising: a reference voltage source; thermometer decoding means for receiving a plurality m of consecutive and most significant bits from a plurality n of binary input signals, and producing binary output signals on 2 m- 1 output lines in a thermometer code indicative of the m most significant bits of the input quantity; a first register having a plurality (n-m) of binary stages for holding a set of (n-m) consecutive and least significant bits of the binary input signal; a second register having 2 m- 1 binary stages for holding binary signals output from said thermometer decoding means; a plurality of 2 -1 identical current sources coupled to said voltage reference; a plurality of 2 -1 current segment switches connected to receive current from said identical current sources, to receive switching signals from said second register, and to conduct current to an analog output terminal; a plurality of (n-m) current sources coupled to said voltage reference to provide binary weighting; and a plurality of (n-m) current-weighted switches connected to receive current from said (n-m) weighted current sources, to receive switching signals from said first register, and to conduct current to said analog output terminal; whereby the converter of the invention keeps output glitch energy low by the use of current segment switches for the most significant bits of the input quantity to be converted.
Claim 9
Dependent Claim
35 words
'A digit-to-analog converter as set forth in claim 6, and further including: time delay means coupled to the input to said first register, to provide a time delay matching that of said thermometer decoding means.
References Cited (Backward Citations)
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