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EP0132562A2 Expired / Lapsed EP ⏱️ 0.0 years remaining

Composite display system

Assignee: International Business Machines Corp
•
Filing: 1984-06-08
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Granted: —
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Expires: 2004-06-08
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Abstract

Abstract Pixel representations for each of a plurality of superimposed (or splitscreen) display portions are accumulated in a band buffer prior to being transferred to the display. The actual pixel representations are made available to the band buffer from an image memory, with addresses provided by a display list memory. This system mimimizes the need for buffering and high speed storage to service the video, by addressing first the display list memory, then in turn using the content of the display list memory to address the image storage, and then in turn using the content of the image storage as the actual pixel representations for accumulation in the band buffer. Two band buffers operate alternatively. The current band buffer is feeding a band of pixel representations to the video shift register while the next band buffer is accumulating the pixel representations of the subsequent video display band. The band buffer accumulates actual pixel representations equivalent to the related band of the display. The pixel representations sent to the band buffer from image memory are gated by controls which ensure that the proper pixel prevails in the case of a composite display made up of a primary display with a secondary display which might have higher priority, as for example, a text announcement superimposed over a normal entertainment program image.

Inventors

  • 👤 David Frederick Bantz
  • 👤 Davey Lee Malaby
  • 👤 Paul Norman Sholtz

Bibliographic Details

Application Number —
Jurisdiction EP
Data Source google_patents
Last Synchronized 2026-11-03 11:52
CPC Classifications
G; G09; G09G; G09G5/00; G09G5/42

Claims Analysis

Total Claims: 5
Claim 1
Independent Claim 251 words
A composite display system of the multi-port type for creating a primary display selectively with one or more superimposed or inset secondary displays, having video forwarding means matched to the display -- characterized by -- a) band buffer means including at least a temporarily assigned "next" band buffer for accumulating the next band of the composite display; b) image memory means for providing actual pixel representations of the secondary display; c) display list memory means, for storing the addresses of various segments of display data stored in said image memory; d) data address storage means, for storing the addresses of data in said display list memory means so as to derive addresses for a composite display; e) gating means for gating pixel representations from predetermined locations in said image memory means, called for by said display list memory means according to addresses specified by said display list memory means and said data address storage means, to storage locations in said band buffer means, whereby said next band buffer accumulates pixel representations for the assigned band of the composite display; f) transfer means for transferring the accumulated pixel representations from the band buffer means to the video forwarding means; and g) control means to control said gating means and said transfer means to accumulate in said next band buffer the pixel representations for a band of the composite display, and subsequently to control said transfer means to transfer the pixel representations accumulated in the band buffer means to the video forwarding means.
Claim 2
Dependent Claim 251 words
A composite display system of the multi-port type for creating a primary display selectively with one or more superimposed or inset secondary displays, having video forwarding means matched to the display -- characterized by -- a) band buffer means including at least a temporarily assigned "next" band buffer for accumulating the next band of the composite display; b) image memory means for providing actual pixel representations of the secondary display; c) display list memory means, for storing the addresses of various segments of display data stored in said image memory; d) data address storage means, for storing the addresses of data in said display list memory means so as to derive addresses for a composite display; e) gating means for gating pixel representations from predetermined locations in said image memory means, called for by said display list memory means according to addresses specified by said display list memory means and said data address storage means, to storage locations in said band buffer means, whereby said next band buffer accumulates pixel representations for the assigned band of the composite display; f) transfer means for transferring the accumulated pixel representations from the band buffer means to the video forwarding means; and g) control means to control said gating means and said transfer means to accumulate in said next band buffer the pixel representations for a band of the composite display, and subsequently to control said transfer means to transfer the pixel representations accumulated in the band buffer means to the video forwarding means.
Claim 3
Dependent Claim 95 words
A composite display system according to Claim 1, wherein said band buffer means comprises a plurality of band buffers, including a temporarily assigned "current" band buffer and one or more temporarily assigned "next" band buffers, and wherein said control means effectuates said next band buffer of said band buffer means to accumulate the pixel representations of the next band and concurrently effectuates said current band buffer of said band buffer means to transfer the pixel representations previously accumulated in said current band buffer while said current band buffer was temporarily assigned as next band buffer.
Claim 4
Dependent Claim 41 words
A composite display system according to Claim 1 including a comparator, and control means responsive to said comparator to bypass the access to said image memory means when the next memory access address is identical to the previous memory access address.
Claim 5
Dependent Claim 49 words
A composite display system according to Claim 1 including a band buffer assembly unit incorporated in said band buffer means, a comparator, and control means responsive to said comparator to bypass writing into the band buffer except when the band buffer address changes or when a transfer is complete.

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