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EP0131416A2 Expired / Lapsed EP ⏱️ 0.0 years remaining

Constraint application processor

Assignee: Qinetiq Ltd
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Filing: 1984-06-29
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Granted: —
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Expires: 2004-06-29
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Abstract

Abstract A constraint application processor (10, 30) is arranged to apply a linear constraint to signals from antennas (14). A main antenna aignal is fed to constraint element multipliers (22) and thence to respective adders (16) for subtraction from subsidiary antenna signals. Delay units (15) delay the subsidiary signals by one clock cycle prior to subtraction. The main signal is also fed via a one-cycle delay unit (17) to a multiplier (18) for amplification by a gain factor. Main and subsidiary outputs (24) of the processor (10, 30) may be connected to an output processor (32, 60) for signal minimisation subject to the main gain factor remaining constant. The output processor (32, 60) may be arranged to produce recursive signal residuals in accordance with the Widrow LMS algorithm. This requires a processor (32) arranged to sum main and weighted subsidiary signals, weight factors being derived from preceding data, residual and weight factors. Alternatively, a systolic array (60) of processing cells (61, 62, 63) may be employed.

Inventors

  • 👤 John Graham Mcwhirter

Bibliographic Details

Application Number —
Jurisdiction EP
Data Source google_patents
Last Synchronized 2026-11-01 13:27
CPC Classifications
H; H01; H01Q; H01Q3/00; H01Q3/26; H01Q3/2605; H01Q3/2611; H01Q3/2629; H01Q3/2635

Claims Analysis

Total Claims: 10
Claim 1
Independent Claim 74 words
A constraint application processor including input means (12) for accommodating a main input signal and a plurality of subsidiary input signals, characterised in that the processor also includes means (16, 22) for subtracting from each subsidiary input signal a product of a respective constraint coefficient with the main input signal to provide subsidiary output signals, and means (18) for applying a gain factor to the main input signal to provide a main output signal.
Claim 2
Dependent Claim 74 words
A constraint application processor including input means (12) for accommodating a main input signal and a plurality of subsidiary input signals, characterised in that the processor also includes means (16, 22) for subtracting from each subsidiary input signal a product of a respective constraint coefficient with the main input signal to provide subsidiary output signals, and means (18) for applying a gain factor to the main input signal to provide a main output signal.
Claim 3
Dependent Claim 47 words
A constraint application processor according to Claim 1 characterised in that it includes an output processor (32, 60) for processing output signals therefrom to extract a signal residual corresponding to minimisation of the input signals subject to the proviso that the main signal gain factor is constant.
Claim 4
Dependent Claim 26 words
A constraint application processor according to Claim 2 characterised in that the output processor (32) is arranged to operate in accordance with the Widrow LMS algorithm.
Claim 5
Dependent Claim 35 words
A constraint application processor according to Claim 3 characterised in that the output processor (32) includes weighting means (36 to 58) for weighting successive sets of output signals recursively with respective sets of weight factors.
Claim 6
Dependent Claim 62 words
A constraint application processor according to Claim 4 characterised in that the weighting means (36 to 58) comprises means (44 to 52) for multiplying output signals by a preceding signal residual and a convergence constant to produce respective weight correction factors, and means (54 to 58) for adding the weight correction factors to preceding weight factors to produce respective updated weight factors.
Claim 7
Dependent Claim 32 words
A constraint application processor according to Claim 2 characterised in that the output processor (60) includes a systolic array (60) of processing cells (61, 62, 63) arranged to produce signal residuals recursively.
Claim 8
Dependent Claim 53 words
A constraint application processor according to Claim 6 characterised in that the systolic array (60) includes boundary and internal cells (61 and 62) for respectively evaluating rotation parameters from and applying rotation parameters to output signals, and means (63) for deriving residuals comprising products of cumulatively rotated output signals with cosine rotation parameters.
Claim 9
Dependent Claim 84 words
A constraint application processor including a first processor (70) according to Claim 1 characterised in that it also includes a second such processor (72) including: a main input connected to a subsidiary signal output of the first processor and arranged to provide second processor main signals; means (74) for amplifying signals from the main input by a second gain factor; means (76) for generating main second processor output signals each comprising the sum of an amplified signal and a main first processor output signal.
Claim 10
Dependent Claim 50 words
A constraint application processor according to Claim 8 characterised in that it comprises a cascaded arrangement of a first processor (70), a second processor (72) and one or more subsequent processors (72) each arranged as a second processor (72) and connected to that preceding as to a first processor (70).

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