EP0131379A2
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Semiconductor device having a heterojunction, and method for producing it
Assignee: Fujitsu Ltd
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Filing: 1984-06-06
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Granted: —
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Expires: 2004-06-06
Abstract
Abstract A semiconductor device including an FET using a two-dimensional electron gas (2DEG), comprising a substrate (1), a first semiconductor layer (2), typically an undoped GaAs layer, formed on the substrate (1), and a second semiconductor layer (8) typically an n-type AlGaAs layer. Lyers (2) and (9) are typically formed by molecular beam epitaxy. The device also includes a source electrode (10) and a drain electrode (11) formed on the second layer (9) and having alloyed regions (12, 13), and a gate electrode (14) formed on the second layer (9). To decrease the contact resistance between the alloyed regions (12, 13) and the 2DEG layer in the first layer (2), impurity doped regions (6, 7) are formed in the first layer (2) under the source electrode (10) and the drain electrode (11) by an ion-implantation method, prior to the formation of the second layer (9). An internal conductive line (27) or resistor (46) may be formed (Figures 2 and 3) by doping impurities into the first layer (22 or 42) by an ion-implantation method prior to the formation of the second layer (28 or 47).
Inventors
- 👤 Shigeru Okamura
Bibliographic Details
Application Number
—
Jurisdiction
EP
Data Source
google_patents
Last Synchronized
2026-10-28 14:10
CPC Classifications
H; H10; H10D; H10D30/00; H10D30/40; H10D30/47; H10D30/471; H10D30/475; H10D30/4755; H10P; H10P30/00; H10P30/20; H10P30/21; H10D30/80; H10D62/00; H10D62/10; H10D62/13; H10D62/149; H10D62/161; H10D84/00; H10D84/01; H10D84/02; H10D84/05; H10P30/202; H10P30/206; H10P30/28
Claims Analysis
Total Claims: 14
Claim 1
Independent Claim
91 words
A method of producing a semiconductor device having a heterojunction and using a two-dimensional electron gas, comprising the steps of: forming a first semiconductor layer on a substrate; forming a second semiconductor layer as an electron-supply layer having a smaller electron affinity than that of the first semiconductor layer above the first semiconductor layer; and forming a source electrode and a drain electrode on the second semiconductor layer, characterized by the step of forming impurity doped regions by doping impurities into the first semiconductor layer before forming the second semiconductor layer.
Claim 2
Independent Claim
91 words
A method of producing a semiconductor device having a heterojunction and using a two-dimensional electron gas, comprising the steps of: forming a first semiconductor layer on a substrate; forming a second semiconductor layer as an electron-supply layer having a smaller electron affinity than that of the first semiconductor layer above the first semiconductor layer; and forming a source electrode and a drain electrode on the second semiconductor layer, characterized by the step of forming impurity doped regions by doping impurities into the first semiconductor layer before forming the second semiconductor layer.
Claim 3
Dependent Claim
36 words
A method according to claim 1, also including the step of forming a thin semiconductor layer of the same material as the first semiconductor layer on the first semiconductor layer before forming the second semiconductor layer.
Claim 4
Dependent Claim
66 words
A method according to claim 1 or 2 in which the step of forming the impurity doped regions comprises forming a masking film above the first semiconductor layer; selectively etching the masking film to open windows; doping the impurities into the first semiconductor layer through the windows by an ion-implantation method; removing the masking film; and annealing the first semiconductor layer including the impurity doped regions.
Claim 5
Dependent Claim
38 words
A method according to claim 3, in which the step of forming the impurity doped regions includes forming another impurity doped region to serve as a conductive line or resistor by doping impurities into the first semiconductor layer.
Claim 6
Dependent Claim
88 words
A method according to claim 3, in which the masking film is selectively etched to open another window for said another impurity doped region or in which the step of forming said another impurity doped region comprises forming another masking film above the first semiconductor layer; selectively etching said another masking film to open a window; doping the impurities into the first semiconductor layer through the window in said another masking film by ion-implantation; and removing said another masking film; inbetween the removing step and the annealing step.
Claim 7
Dependent Claim
32 words
A method according to claim 3, 4 or 5, in which before the annealing step, a protective film is formed above the first semiconductor layer and is removed after the annealing step.
Claim 8
Dependent Claim
38 words
A method according to claim 3, 4, 5 or 6, in which during the annealing step, the exposed surface is contacted by a mixture of hydrogen (H 2 ), nitrogen (N 2 ) and arsine (AsH 3 ).
Claim 9
Independent Claim
27 words
A method according to any one of the preceding claims, in which the first semiconductor layer and the second semiconductor layer are formed by molecular beam epitaxy.
Claim 10
Dependent Claim
132 words
A semiconductor device having a heterojunction and using a two-dimensional electron gas, comprising: a substrate (1); a first semiconductor layer (2) formed on the substrate (1); a second semiconductor layer (9) forming an electron supply layer and having a smaller electron affinity than that of the first semiconductor layer (2) formed above the first semiconductor layer (2); a source electrode (10) and a drain electrode (11) formed on the second semiconductor layer (9) and having alloyed regions (12,13) extending to the first semiconductor layer (2); and a gate electrode (14) formed on the second semiconductor layer (9), characterised in that the first semiconductor layer (2) has impurity doped regions (6,7) under the source electrode (10) and drain electrode (11), the alloyed regions (12, 13) extending into the impurity doped regions (6, 7).
Claim 11
Dependent Claim
132 words
A semiconductor device having a heterojunction and using a two-dimensional electron gas, comprising: a substrate (1); a first semiconductor layer (2) formed on the substrate (1); a second semiconductor layer (9) forming an electron supply layer and having a smaller electron affinity than that of the first semiconductor layer (2) formed above the first semiconductor layer (2); a source electrode (10) and a drain electrode (11) formed on the second semiconductor layer (9) and having alloyed regions (12,13) extending to the first semiconductor layer (2); and a gate electrode (14) formed on the second semiconductor layer (9), characterised in that the first semiconductor layer (2) has impurity doped regions (6,7) under the source electrode (10) and drain electrode (11), the alloyed regions (12, 13) extending into the impurity doped regions (6, 7).
Claim 12
Dependent Claim
39 words
A semiconductor device according to claim 9, in which a thin semiconductor layer (61) of the same material as the first semiconductor layer (2) is formed between the first semiconductor layer (2) and the second semiconductor layer (9, 62).
Claim 13
Dependent Claim
37 words
A device according to claim 9 or 10, in which the first semiconductor layer (2) is gallium-arsenide, germanium, indium-antimonide, or indium-arsenide; and in which the second semiconductor layer (9, 62) is aluminum- gallium-arsenide, gallium-arsenide, cadmium-telluride, or gallium-antimonide.
Claim 14
Dependent Claim
32 words
A device according to claim 9, 10 or 11, in which the first semiconductor layer (2) includes another impurity doped region (27, 46) which acts as a conductive line or a resistor.
References Cited (Backward Citations)
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