Circuit for processing pulses by applying the technique of weighted acquisition

Claim 3

A method according to claim 1, wherein said weight function is obtained by evaluating partial derivatives of a first function for each weighting coefficient and setting all the partial derivatives zero, said first function depends on both the energy dependent signal-to-noise ratios of said pulses and the energy dependent modulation transfer functions of said pulses.

Claim 4

A method according to claim 2, wherein said first function depends on the squares of said modulation transfer functions.

Claim 5

A method according to claim 3, wherein said first function depends on both the square of said signal-to-noise ratios and square of said modulation transfer functions.

Claim 6

A method according to claim 2, wherein said first function is defined as - wherein S/N is the weighted signal-to-noise ratio with S as signal and N as noise and MTF is the weighted modulation transfer function, and f is the spatial frequency from a low value, such as zero frequency, up to a high value, such as the maximum measured frequency response.

Claim 7

A method according to claim 5 wherein the weight function comprises coefficients W i for weighting, which are evaluated by the step of forming where the index i identifies individual, contiguous Z (energy) signal channels, thereby getting a second function.

Claim 8

A method according to claim 6, wherein the coefficients W i for weighting are evaluated from that second function by the step of forming wherein S I and N i correspond to the signal and noise values of a line source response function (LSRF) and K is a scale factor introduced to emphasize the role of resolution in the performance of W i .

Claim 9

A method according to claim 1, comprising the steps of a) storing an image weight function for each radioactive source after having formed this image weight function; b) obtaining a weighting pulse for each of said pulses to be processed, the particular stored value of said image weight function determined by the observed energy of said pulse.

Claim 10

A circuit for processing pulses caused by a radioactive source and produced by an imaging radiation detector by applying the technique of weighted acquisition for forming an image, said circuit comprising: a) means for forming an image weight function corresponding to the source radiation, said function being dependent on the energy of said pulses in consideration of both the energy dependent signal-to-noise ratios of said pulses and the energy dependent modulation transfer functions of said pulses, b) means for obtaining a weighting pulse for each of said pulses, the particular value of said image weight function determined by the observed energy of said pulse; and c) means for accumulating said weighting pulses as said image.

Claim 11

A circuit for processing pulses caused by a radioactive source and produced by an imaging radiation detector by applying the technique of weighted acquisition for forming an image, said circuit comprising: a) means for forming an image weight function corresponding to the source radiation, said function being dependent on the energy of said pulses in consideration of both the energy dependent signal-to-noise ratios of said pulses and the energy dependent modulation transfer functions of said pulses, b) means for obtaining a weighting pulse for each of said pulses, the particular value of said image weight function determined by the observed energy of said pulse; and c) means for accumulating said weighting pulses as said image.

Claim 12

A circuit according to claim 9, wherein said means for forming an image weight function comprising means for storing an image weight function for each radioactive source and wherein said means for obtaining a weighting pulse are connected to said storing means for obtaining a weighting pulse for each of said pulses to be processed, the particular stored value of said image weight function determined by the observed energy of said pulse.

Claim 13

A circuit for processing pulses caused by a radioactive source and produced by an imaging radiation detector by applying the technique of weighted acquisition for forming an image, said circuit comprising a) a weight function memory having a data output; b) a subtract buffer image memory having a data Input and a data output; c) an adder connected with the data output of said weight function memory and connected with said data output of said subtract buffer image memory for forming a sum signal of the output data of said weight function memory and said subtract buffer image memory; d) means associated with said adder for producing a polarity signal in dependence on the polarity of said sum signal performed by said adder; and e) means associated with said adder and controlled by said polarity signal for supplying a negative sum signal to the data input of said subtract buffer image memory.

Claim 14

A circuit for processing pulses caused by a radioactive source and produced by an imaging radiation detector by applying the technique of weighted acquisition for forming an image, said circuit comprising a) a weight function memory having a data output; b) a subtract buffer image memory having a data Input and a data output; c) an adder connected with the data output of said weight function memory and connected with said data output of said subtract buffer image memory for forming a sum signal of the output data of said weight function memory and said subtract buffer image memory; d) means associated with said adder for producing a polarity signal in dependence on the polarity of said sum signal performed by said adder; and e) means associated with said adder and controlled by said polarity signal for supplying a negative sum signal to the data input of said subtract buffer image memory.

Claim 15

A circuit according to claim 11, further comprising means associated with this adder and controlled by said polarity signal for applying a zero signal of a zero signal generator to said data input of said subtract buffer image memory, when the sum signal is positive.

Claim 16

A circuit according to claim 12, wherein said polarity signal is a sign bit which is in a first status when said sum signal is positive and which is in a second status when said sum signal is negative and wherein said means for supplying said negative sum signal and said means for supplying said zero signal comprising a multiplexer switdzable dependent on the status of said sign bit into a first switching position, when the sign bit is in said second status and into a second switching position, when the sign bit is in said first status, whereby said multiplexer in said first twitching position supplying said sum signal of said adder and in said second switching position supplying said zero signal of said zero signal generator to said data input of said subtract buffer . image memory.

Claim 17

A circuit according to claim 13, wherein said sign bit is also in said second status when said sum signal is zero.

Claim 18

A circuit according to claim 13, wherein said sign bit is ZERO in said first status and ONE in said second status.

Claim 19

A circuit according to claim 11, further comprising a) a digital to analog converter receiving said sum signal of said adder as a digital input signal; b) a pulse width modulator connected to the analog output of said digital to analog converter; and c) an analog display unit having an unblank input connected with the output of said pulse width modulator; wherein said pulse width modulator producing on its output an unblank signal for said analog display unit, which unblank signal has a minimum time length when the sum signal of said adder is negative, such that no exposure value is produced with respect to the analog display unit and which unblank signal has a greater time length when the sum signal of said adder is positive such that an exposure value is produced with respect to said analog display unit.

Claim 20

A circuit according to claim 16, wherein said unblank signal of said pulse width modulator has also said 1I inimum time length, when the sum signal is zero.

Claim 21

A circuit according to claim 11, further comprising a) a keyboard for choosing an appropriate weighting coefficient set; and b) a microprocessor having an input connected with said keyboard and having a first data output and a first address output; wherein said first data output is connected with the data input of said weight function memory and said first address output is connected with an address input of said weight function memory such that the weight function memory is able to receive data and addresses from said microprocessor according to the selected weighting coefficient set.

Claim 22

A circuit according to claim 18, further comprising a) a first address multiplexer having a first and a second address input and an address output; and b) a first analog to digital converter having an digital output and an analog input; wherein the analog input of said first analog to digital converter is connected to an output for an Z energy signal of said imaging radiation detector and said digital output of said analog to digital converter is connected to the second address input of said first multiplexer and wherein said first address input of said first multiplexer is connected to said first address output of said microprocessor and the eddress output of said first multiplexer is connected to the address input of said weight function memory, such that in a first switching position of said first multiplexer said weight function memory is addressed by said microprocessor and in a second switching position said weight function memory is addressed by said first analog to digital converter.

Claim 23

A circuit according to claim 19, further comprising a) a second address multiplexer having a first and a second address input and an address output; b) a second analog to digital converter having a digital output and an analog input; and c) a third analog to digital converter having a digital output and an analog input; wherein said analog input of said second analog to digital converter is connected to an X coordinate output and said analog input of said third analog to digital converter is connected to a Y coordinate output of said imaging radiation detector and said digital outputs of Said second and third analog to digital converters are connected to the second input of said second multiplexer and wherein said first address input of said second multiplexer is connected to a second address output of said microprocessor and the address output of said second multiplexer is connected to the address input of said subtract buffer image memory, such that in a first switching position of said second multiplexer said subtract buffer image memory is addressed by said microprocessor and in a second switching position said subtract buffer image memory is addressed by said second and third analog to digital converters.

Claim 24

A circuit according to claim 20, wherein said microprocessor comprising a second data output, which is connected with said data input of said subtract buffer image memory.

Claim 25

A circuit according to claim 11, wherein said data output of said weight function memory is connected to a digital display unit.