A semiconductor device comprising packing means for protecting parts of the device

Claim 2

A semicoductor device comprising: first packing means comprising a first laminated structure having at least a single first metallic layer and at least a single first insulating layer, at least one end surface of said first laminated structure being said first insulating layer, second packing means comprising a second laminated structure having at least a single second metallic layer and at least a single second insulating layer, at least one end surface of said second laminated structure being said second insulating layer, said fisrt insulating layer and said second insulating layer positioned respectively in said-end surfaces of said first and second laminated structures being opposed to each other and the respective peripheral portions thereof being connected with each other in an airtight manner, so that said first packing means and said second packing means are connected in a state where an airtight hollow portion is formed therebetween, an electronic component comprising a semiconductor element provided inside said hollow portion, and at least one lead means interposed in the boundary of connection between said first insulating layer and said second insulating layer positioned respectively in said end surfaces of said first and second laminated structures, one end of said lead means extending into said hollow portion so as to be electrically connected to said electronic component and the other end thereof extending from said boundary of connection to the exterior.

Claim 3

A semiconductor device in accordance with claim 1, wherein the thickness of at least either said first metallic layer or said second metallic layer is in the range from 0.1 micron to 3000 microns.

Claim 4

A semicondcutor device in accordance with claim 1, wherein at least either said first insulating layer or said second insulating layer contains a high molecular material.

Claim 5

A semiconductor device in accordance with claim l, wherein at least either said first insulating layer or said second insulating layer contains a complex material formed of a material selected from a group of glass and high molecular fibers and a thermosetting resin.

Claim 6

A semiconductor device in accordance with claim 1, wherein at least either said first insulating layer or said second insulating layer contains a thermoplastic resin.

Claim 7

A semiconductor device in accordance with claim 1, wherein said hollow portion is filled with inert gas.

Claim 8

A semiconductor device, comprising: first packing means comprising a first laminated structure having at least a single first metallic layer, at least a single first reinforcing layer and at least a single first insulating layer, at least one end surface of said first laminated structure being said first insulating layer and said first laminated structure being maintained in a state where the adjacent layers are fixed together, second packing means comprising a second laminated structure having at least a single second metallic layer, at least a single second reinforcing layer and at least a single second insulating layer, at least one end surface of said second laminated structure being said second insulating layer, said second laminated structure being maintained in a state where the adjacent layers are fixed together, and said first insulating layer and said second insulating layer positioned respectively in said end surfaces of said first and second laminated structures being opposed to each other with the peripheral portions thereof being stuck together by fusion in an airtight manner, whereby said first packing means and said second packing means are connected in a state where an airtight hollow portion is formed therebetween, an electronic component comprising a semiconductor element provided inside said hollow portion, and at least one lead means interposed in the boundary of connection between said first insulating layer and said second insulating layer positioned respectively in said end surfaces of said first and second laminated structures, one end of said lead means extending into said hollow portion so as to be electrically connected to said electronic component and the other end thereof extending from said boundary of connection to the exterior.

Claim 9

A semiconductor device, comprising: first packing means comprising a first laminated structure having at least a single first metallic layer, at least a single first reinforcing layer and at least a single first insulating layer, at least one end surface of said first laminated structure being said first insulating layer and said first laminated structure being maintained in a state where the adjacent layers are fixed together, second packing means comprising a second laminated structure having at least a single second metallic layer, at least a single second reinforcing layer and at least a single second insulating layer, at least one end surface of said second laminated structure being said second insulating layer, said second laminated structure being maintained in a state where the adjacent layers are fixed together, and said first insulating layer and said second insulating layer positioned respectively in said end surfaces of said first and second laminated structures being opposed to each other with the peripheral portions thereof being stuck together by fusion in an airtight manner, whereby said first packing means and said second packing means are connected in a state where an airtight hollow portion is formed therebetween, an electronic component comprising a semiconductor element provided inside said hollow portion, and at least one lead means interposed in the boundary of connection between said first insulating layer and said second insulating layer positioned respectively in said end surfaces of said first and second laminated structures, one end of said lead means extending into said hollow portion so as to be electrically connected to said electronic component and the other end thereof extending from said boundary of connection to the exterior.

Claim 10

A semiconductor device in accordance with claim 7, wherein at least either said first insulating layer or said second insulating layer contains a high molecular material.

Claim 11

A semiconductor device in accordance with claim 7, wherein at least either said first insulating layer or said second insulating layer contains a complex material formed of a material selected from a group of glass and high molecular fibers and a thermosetting resin.

Claim 12

A semiconductor device in accordance with claim 7, wherein at least either said first insulating layer or said second insulating layer contains a thermoplastic resin.

Claim 13

A semiconductor device in accordance with claim 7, wherein at least either said first reinforcing layer or said second reinforcing layer contains a material selected from a group including glass, ceramic, asbestos, mica, metal and paper.

Claim 14

A semiconductor device in accordance with claim 7, wherein at least either said first reinforcing layer or said second reinforcing layer contains a material selected from a group including glass, ceramic, asbestos, mica, metal and paper, and a thermosetting resin.

Claim 15

A semiconductor device in accordance with claim 7, wherein at least either said first reinforcing layer or said second reinforcing layer contains a thermoplastic resin.

Claim 16

A semiconductor device in accordance with claim 7, wherein at least either said first reinforcing layer or said second reinforcing layer contains a material selected from a group including glass, ceramic, asbestos, mica, metal and paper, and a thermoplastic resin.

Claim 17

A semiconductor device in accordance with claim 7, wherein said hollow portion is filled with inert gas.

Claim 18

A semiconductor device in accordance with claim 7, wherein in said first insulating layer and said second insulating layer with the peripheral portions thereof being fixed together, at least a portion of the surfaces thereof facing said hollow portion is coated with a material capable of absorbing water.

Claim 19

A semiconductor device comprising a semiconductor element, leads electrically connected to said semiconductor element, and packing means enclosing said semiconductor element and portions of said leads, said packing means providing a hollow hermetically sealed cavity within which said semiconductor element is located.

Claim 20

A semiconductor device comprising a semiconductor element, leads electrically connected to said semiconductor element, and packing means enclosing said semiconductor element and portions of said leads, said packing means providing a hollow hermetically sealed cavity within which said semiconductor element is located.

Claim 21

A semiconductor device comprising a semiconductor element, leads electrically connected to said semiconductor element, and packing means enclosing said semiconductor element and portions of said leads, said packing means comprising first and second laminated structures arranged with said semiconductor element therebetween and connected to one another in an airtight manner.

Claim 22

A semiconductor device comprising a semiconductor element, leads electrically connected to said semiconductor element, and packing means enclosing said semiconductor element and portions of said leads, said packing means comprising first and second laminated structures arranged with said semiconductor element therebetween and connected to one another in an airtight manner.