Claims Analysis
Total Claims: 13
Claim 1
Independent Claim
154 words
In a network where data is transferred between a main host computer and a magnetic tape peripheral unit via a peripheral-controller, wherein said peripheral-controller is initiated by commands from said host computer to execute data transfer operations, and said peripheral-controller includes a common control circuit unit for sequencing micro-code instructions and a peripheral dependent circuit unit for managing said tape peripheral unit, a data block burst mode transfer system comprising: (a) buffer memory means in said peripheral-controller for temporary storing blocks of data being transferred, said buffer memory means having channels of connection to said tape peripheral unit and to said host computer; (b) means to transfer data in a burst mode using a continuous transfer of a block of words from said main host system to said buffer memory means; (c) -means to count the number of words transferred from said main host system to said buffer memory means during said burst mode.
Claim 2
Dependent Claim
154 words
In a network where data is transferred between a main host computer and a magnetic tape peripheral unit via a peripheral-controller, wherein said peripheral-controller is initiated by commands from said host computer to execute data transfer operations, and said peripheral-controller includes a common control circuit unit for sequencing micro-code instructions and a peripheral dependent circuit unit for managing said tape peripheral unit, a data block burst mode transfer system comprising: (a) buffer memory means in said peripheral-controller for temporary storing blocks of data being transferred, said buffer memory means having channels of connection to said tape peripheral unit and to said host computer; (b) means to transfer data in a burst mode using a continuous transfer of a block of words from said main host system to said buffer memory means; (c) -means to count the number of words transferred from said main host system to said buffer memory means during said burst mode.
Claim 3
Dependent Claim
51 words
The system of claim 1, wherein said host system initiates a Write operation command to said peripheral-controller to transfer data from said main host computer to a tape peripheral unit, and said common control circuit unit initiates routines to transfer data from said main host computer to said buffer memory means.
Claim 4
Dependent Claim
50 words
The system of claim 2, wherein said means to count includes: (a) burst counter means for counting the number of words transferred into said buffer memory means from said main host system; (b) means for signalling said common control circuit unit when a preset number of words have been transferred.
Claim 5
Dependent Claim
79 words
The system of claim 1, wherein said main host system initiates a Read operation command to said peripheral-controller to transfer data from said peripheral tape unit to said main host system, and wherein data transferred from said peripheral tape unit is placed in said buffer memory means, and wherein said peripheral-controller then connects to said main host system in order to initiate burst mode data transfer operations of data from said buffer memory means to said main host system.
Claim 6
Dependent Claim
38 words
The system of claim 4, wherein said means to count the number of words also functions to count the number of words of data transferred from said buffer memory means to said host system during said burst mode.
Claim 7
Dependent Claim
57 words
The system of claim 3, wherein said means for signalling includes: (a) flip-flop means connected to the output of said burst counter means and providing an output signal to said common control circuit unit at the moment when a fixed block of data has been transferred from said buffer memory means to said main host computer system.
Claim 8
Independent Claim
166 words
A system for the transference of data between a magnetic tape peripheral unit and a main host system, wherein a peripheral-controller is initiated by instructions from said main host system to manage data transfer operations, and said peripheral-controller includes a common-control circuit unit for sequencing micro-code instructions and a peripheral dependent circuit unit for interfacing said magnetic tape peripheral unit, the data transfer system comprising: (a) buffer memory means for temporarily storing data-in-transit between said main host system and said magnetic tape peripheral unit; (b) block counter means for carrying a current status signal which indicates the number of blocks of data residing in said buffer memory means; (c) logic circuit means for raising or lowering the said status signal in said block counter means; (d) means to transfer data from said main host system to said buffer memory means, or from said buffer memory means to said main system in a burst mode operation wherein a block of many words is transferred continuously without interruption.
Claim 9
Independent Claim
166 words
A system for the transference of data between a magnetic tape peripheral unit and a main host system, wherein a peripheral-controller is initiated by instructions from said main host system to manage data transfer operations, and said peripheral-controller includes a common-control circuit unit for sequencing micro-code instructions and a peripheral dependent circuit unit for interfacing said magnetic tape peripheral unit, the data transfer system comprising: (a) buffer memory means for temporarily storing data-in-transit between said main host system and said magnetic tape peripheral unit; (b) block counter means for carrying a current status signal which indicates the number of blocks of data residing in said buffer memory means; (c) logic circuit means for raising or lowering the said status signal in said block counter means; (d) means to transfer data from said main host system to said buffer memory means, or from said buffer memory means to said main system in a burst mode operation wherein a block of many words is transferred continuously without interruption.
Claim 10
Dependent Claim
60 words
The data transfer system of claim 7, which includes: (a) means to transfer data between said buffer memory means and said main host system on a demand mode basis whereby full words of data are transferred between said main host system and the buffer memory means at such times as said peripheral-controller is available and not occupied with housekeeping operations.
Claim 11
Dependent Claim
41 words
9 . The data transfer system of claim 8, wherein said burst mode operation between said buffer memory means and said main host systems continues as long as more than two full blocks of data reside in said buffer memory means.
Claim 12
Dependent Claim
44 words
The data transfer system of claim 9, wherein when said buffer memory means has less than two full blocks of data residing therein, data transfer operations between said buffer memory means and said main host system will operate according to said demand mode basis.
Claim 13
Dependent Claim
56 words
A data transfer system of claim 9, wherein said peripheral-controller includes: (a) means to establish the amount of data residing in said buffer memory means when such remaining data is less than two full blocks, said means operating to initiate the demand mode of data transfer between said main host computer and said buffer memory means.