← Back to Patent Explorer
EP0111099A1 Expired / Lapsed EP ⏱️ 0.0 years remaining

A method of making complementary metal oxide semiconductor structures

Assignee: International Business Machines Corp
•
Filing: 1983-10-11
•
Granted: —
•
Expires: 2003-10-11
📄 Original PDF 🌐 Google Patents 🔄 Sync Now

Abstract

Abstract A very simple process is provided, with reduced processing time, for making a CMOS structure using a single polysilicon, or other refractory material, layer which includes forming a thin gate oxide on'both N and P type semiconductor layers (40, 12) of a common substrate (10), forming a gate electrode (50, 54) simultaneously on the N type and on the P type layers (40, 12) and selectively implanting an N type impurity to form N+ source and drain regions (58, 60) in the P type layer (12). The semiconductor layers are then oxidized to form substantially thicker oxide (66, 68), such a silicon dioxide, adjacent to the sides of the gate electrode (50) over the P type layer (12) than the thickness of the oxide (70, 72) adjacent to the sides of the gate electrode (54) over the N type layer (40). Without using a mask, a P type impurity is implanted into the N type layer to form P+ source and drain regions (78, 80).

Inventors

  • 👤 Peter Edwin Cottrell
  • 👤 Henry John Geipel, Jr.

Bibliographic Details

Application Number —
Jurisdiction EP
Data Source google_patents
Last Synchronized 2026-11-06 04:32
CPC Classifications
H; H10; H10D; H10D84/00; H10D84/01; H10D84/0123; H10D84/0126; H10D84/0165; H10D84/017; H10D84/02; H10D84/03; H10D84/038; Y; Y10; Y10S; Y10S438/00; Y10S438/981

Claims Analysis

Total Claims: 11
Claim 1
Independent Claim 195 words
A method of making a complementary metal oxide semiconductor (CMOS) structure characterized by the steps of: forming a thin gate oxide on a semiconductor substrate (12), forming a first gate electrode (50) for an N channel device (52) on a first, P portion of said substrate (12) and a second gate electrode (54) for a P channel device (56) on a second N portion of said substrate (12), masking the second portion of said substrate (12), implanting N type ions into said first portion to form source and drain regions (58, 60) for said N channel device (52), removing the masking material (62) from said second portion, oxidizing the surface of said substrate (12) without said gate electrodes (50, 54), and implanting P type ions into the first and second portions of said substrate (12) so as to form source and drain regions (78, 80) for said P channel device (56) having a given number of P type ions per unit area in said P channel device source and drain regions (78, 80) and a lesser number of P type ions per unit area in said N channel device source and drain regions (58, 60).
Claim 2
Independent Claim 195 words
A method of making a complementary metal oxide semiconductor (CMOS) structure characterized by the steps of: forming a thin gate oxide on a semiconductor substrate (12), forming a first gate electrode (50) for an N channel device (52) on a first, P portion of said substrate (12) and a second gate electrode (54) for a P channel device (56) on a second N portion of said substrate (12), masking the second portion of said substrate (12), implanting N type ions into said first portion to form source and drain regions (58, 60) for said N channel device (52), removing the masking material (62) from said second portion, oxidizing the surface of said substrate (12) without said gate electrodes (50, 54), and implanting P type ions into the first and second portions of said substrate (12) so as to form source and drain regions (78, 80) for said P channel device (56) having a given number of P type ions per unit area in said P channel device source and drain regions (78, 80) and a lesser number of P type ions per unit area in said N channel device source and drain regions (58, 60).
Claim 3
Dependent Claim 45 words
A method of making a complementary metal oxide semiconductor (CMOS) structure as set forth in Claim 1 wherein said lesser number of P type ions is a quantity of ions which does not significantly alter the threshold voltage characteristics of said N channel device (52).
Claim 4
Independent Claim 28 words
A method as set forth in Claims 1 or 2 wherein said first and second gate electrodes (50, 54) are made of an oxidizable electrically conductive refractory material.
Claim 5
Dependent Claim 40 words
A method of making a complementary metal oxide semiconductor (CMOS) structure as set forth in Claim 3 further including oxidizing the edges of said gate electrodes (50, 54) simultaneously with the oxidation of said substrate (12) without said gate electrodes.
Claim 6
Independent Claim 58 words
A method of making a complementary metal oxide semiconductor (CMOS) structure as set forth in Claims 1 to 4 wherein the oxidized substrate (12) forms a thicker layer of insulating material (66, 68) above said N channel device (52) source and drain regions (58, 60) than above the second portion of said substrate adjacent said second electrode (54).
Claim 7
Independent Claim 41 words
A method as set forth in Claims 1 to 5 wherein said substrate (12) is made of silicon and said layer of insulating material is a layer of silicon dioxide and said gate electrodes (50, 54) are made of doped polysilicon.
Claim 8
Independent Claim 36 words
A method as set forth in Claims 1 to 6 wherein the second portion of said substrate (12) is an N type conductivity well and said N well is masked by a layer of photoresist (64).
Claim 9
Independent Claim 41 words
A method as set forth in Claims 1 to 7 wherein the peak of the Gaussian distribution of the implanted P type ions is within the thicker oxide (66, 68) formed over said N type source and drain regions (58, 60).
Claim 10
Independent Claim 64 words
A method as set forth in Claims 1 to 8 wherein said P type ions are implanted into said source and drain regions (78, 80) of said P channel device (56) at a given distance from the edges of said second gate electrode (54) and subsequently driven substantially said given distance toward the edges of said second gate electrode (54) by an annealing step.
Claim 11
Dependent Claim 31 words
A method as set forth in Claim 9 wherein said P type ions are boron ions and said thicker oxide (66, 68) is at least approximately 1.4 to 2.5 times thicker.

References Cited (Backward Citations)

US4016594A Cited
US4045250A Cited
DE2700873A1 Cited
FR2351501A1 Cited

USPTO Annuity & Maintenance Windows

Maintenance schedule is calculated for granted US utility patents.

Assigned Categories & Tags

No categories assigned to this patent yet.

Assign Category Tag