EP0106417A2
Expired / Lapsed
EP
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Integrated circuit comprising an input protection device
Assignee: Koninklijke Philips NV
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Filing: 1983-10-19
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Granted: —
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Expires: 2003-10-19
Abstract
Abstract A device (16) for preventing an input signal (VI) applied to a terminal (12) of an integrated circuit from damaging a section (18) of the circuit contains thick-oxide insulated-gate FET (Q3) and an enhancement-mode insultated-gate FET (Q1 or Q2) whose drains are integral and are coupled to the terminal. A first voltage (VSS) is supplied to the sources of the FET's. The insulated gate of the thick-oxide FET is coupled to the terminal and the insulated gate of the enhancement-mode FET is coupled to one end of a resistor (R1 or R2) whose other end receives a second voltage (VBB). The resistor enables the enhancement-mode FET to act transiently as a "floating-gate" FET that turns temporarily on to discharge the input signal when it suitably starts to approach a level that would otherwise damage the circuit. Also both FET's may act as a punch-through FET.
Inventors
- 👤 Deepraj Singh Puar
Bibliographic Details
Application Number
—
Jurisdiction
EP
Data Source
google_patents
Last Synchronized
2026-10-27 21:40
CPC Classifications
H; H10; H10D; H10D89/00; H10D89/60; H10D89/601; H03; H03K; H03K19/00; H03K19/003; H03K19/00315
Claims Analysis
Total Claims: 12
Claim 1
Independent Claim
198 words
1 . An integrated circuit comprising a semiconductor body having a surface, a field-oxide region extending at the surface and laterally individually surrounding active semiconductor regions containing electronic elements of the circuit and a protection device for preventing an input signal applied to a terminal of the integrated circuit from damaging a section of the circuit coupled to said terminal, said protection device comprising a thick-oxide insulated gate field effect transistor, whose source receives a first voltage whose drain and whose gate electrode are coupled to said terminal and whose gate dielectric consists at least partly of a part of said field-oxide region, characterized in that the protection device further comprises an enhancement-mode insulated gate field-effect transistor whose source receives the first voltage, whose drain is coupled to said terminal and whose gate electrode is coupled to one end of a resistor, the other end of said resistor receiving a second voltage, the drain of the enhancement-mode field effect transistor being integral with the drain of the thick-oxide field-effect transistor, the enhancement-mode field effect transistor having a channel width of at least 25 microns and the thick-oxide field-effect transistor having a channel width of at least 25 microns.
Claim 2
Dependent Claim
198 words
1 . An integrated circuit comprising a semiconductor body having a surface, a field-oxide region extending at the surface and laterally individually surrounding active semiconductor regions containing electronic elements of the circuit and a protection device for preventing an input signal applied to a terminal of the integrated circuit from damaging a section of the circuit coupled to said terminal, said protection device comprising a thick-oxide insulated gate field effect transistor, whose source receives a first voltage whose drain and whose gate electrode are coupled to said terminal and whose gate dielectric consists at least partly of a part of said field-oxide region, characterized in that the protection device further comprises an enhancement-mode insulated gate field-effect transistor whose source receives the first voltage, whose drain is coupled to said terminal and whose gate electrode is coupled to one end of a resistor, the other end of said resistor receiving a second voltage, the drain of the enhancement-mode field effect transistor being integral with the drain of the thick-oxide field-effect transistor, the enhancement-mode field effect transistor having a channel width of at least 25 microns and the thick-oxide field-effect transistor having a channel width of at least 25 microns.
Claim 3
Dependent Claim
49 words
An integrated circuit as in Claim 1 characterized in that the coupling of the drains to the terminal is along semiconductive material of the drains extending to extreme points that encompass most of their widths so as to distribute current flowing between the sources and drains across their widths.
Claim 4
Dependent Claim
19 words
An integrated circuit as in Claim 1 or 2, characterized in that the resistor is at least 100 ohms.
Claim 5
Dependent Claim
52 words
An integrated circuit as in Claim 1, 2 or 3, characterized in that the semiconductor body comprises a primary monocrystalline semiconductive region and each of the sources and drains of said enhancement-mode and thick-oxide field effect transistors defines a PN junction with the primary region which is maintained at the second voltage.
Claim 6
Dependent Claim
62 words
An integrated circuit as in Claim 1, 2, 3 or 4, characterized in that the second voltage is less than the first voltage plus the threshold voltage of the enhancement mode FET where it is an N-channel FET; and the second voltage is greater than the first voltage plus the threshold voltage of the enhancement-mode FET where it is a P-channel FET.
Claim 7
Dependent Claim
22 words
An integrated circuit as in Claim 1, 2, 3 or 4 characterized in that the first and second voltages are the same.
Claim 8
Dependent Claim
20 words
An integrated circuit as in Claim 6 characterized in that each of the first and second voltage is ground reference.
Claim 9
Dependent Claim
19 words
An integrated circuit as in any of the preceding Claims characterized in that the resistor comprises polycrystalline semiconductor material.
Claim 10
Dependent Claim
24 words
An integrated circuit as in any of the preceding Claims characterized in that an input resistor is coupled between the terminal and the section.
Claim 11
Dependent Claim
30 words
An integrated circuit as in Claim 9 characterized in that the input resistor is connected electrically between the integral drains of the enhancement-mode and thick-oxide field-effect transistors and the section.
Claim 12
Dependent Claim
27 words
An integrated circuit as in any of the preceding Claims characterized in that the channel width of the enhancement-mode field effect transistor is at least 125 microns.
References Cited (Backward Citations)
No citation records indexed.
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