EP0105985A1
Expired / Lapsed
EP
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Complementary metal-oxide semiconductor integrated circuit device
Assignee: Mitsubishi Electric Corp
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Filing: 1982-10-12
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Granted: —
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Expires: 2002-10-12
Abstract
Abstract A complementary metal-oxide semiconductor integrated circuit device comprises a plurality of pairs of N- and P-channel metal-oxide semiconductor transistors (Q1a, Q2a, Q3a, Q4a; Q1b, Q2b, Q3b, Q4b). The plurality of pairs are juxtaposed with respect to each other and no isolation areas are formed between the respective pairs. A single pair or a series of pairs out of the plurality of pairs constitute a functional device (30). The gate electrodes (311a, 311b) of the N- and P-channel metal-oxide semiconductor transistors in the pair adjacent to the functional defice (30) are held in relatively negative (GND) and positive (VDD) potential voltages, respectively, so that the functional device (30) is electrically isolated from the remaining portions.
Inventors
- 👤 Isao c/o Mitsubishi Denki K.K. Ohkura
Bibliographic Details
Application Number
—
Jurisdiction
EP
Data Source
google_patents
Last Synchronized
2026-11-02 12:26
CPC Classifications
H; H10; H10D; H10D84/00; H10D84/90; H10D84/903; H10D84/907; H10D84/80; H10D84/82; H10D84/83; H10D84/85; H10W; H10W10/00; H10W10/01
Claims Analysis
Total Claims: 4
Claim 1
Independent Claim
194 words
A metal-oxide semiconductor integrated circuit device comprising: a plurality of pairs of P- and N-channel metal-oxide semiconductor transistors (Qla, Q2a, Q3a, Q4a; Qlb, Q2b, Q3b, Q4b) having gate electrodes (31a; 31b), said plurality of pairs being juxtaposed with respect to each other and being disposed such that the P-channel metal-oxide semiconductor transistor and N-channel metal-oxide semiconductor transistor in each pair of said plurality of pairs adjoin the P-channel metal-oxide semiconductor transistor and N-channel metal-oxide semiconductor transistor in the pair adjacent thereto, respectively, and a predetermined number of pairs out of said plurality of pairs constituting a functional device (30) having a logical function, characterised in that there are no isolation areas between the respective pairs of said plurality of pairs, and the gate electrodes(3 1 a,3 1b )of the P- and N-channel metal-oxide semiconductor transistors in the pair adjacent to said said functional device (30) are held in relatively positive and negative potential voltages, respectively so that said P- and N-channel metal-oxide semiconductor transistors in said pair adjacent to said functional device are rendered non-conductive so as to electrically isolate said functional device from the remaining portions of the metal-oxide semiconductor integrated circuit device.
Claim 2
Dependent Claim
194 words
A metal-oxide semiconductor integrated circuit device comprising: a plurality of pairs of P- and N-channel metal-oxide semiconductor transistors (Qla, Q2a, Q3a, Q4a; Qlb, Q2b, Q3b, Q4b) having gate electrodes (31a; 31b), said plurality of pairs being juxtaposed with respect to each other and being disposed such that the P-channel metal-oxide semiconductor transistor and N-channel metal-oxide semiconductor transistor in each pair of said plurality of pairs adjoin the P-channel metal-oxide semiconductor transistor and N-channel metal-oxide semiconductor transistor in the pair adjacent thereto, respectively, and a predetermined number of pairs out of said plurality of pairs constituting a functional device (30) having a logical function, characterised in that there are no isolation areas between the respective pairs of said plurality of pairs, and the gate electrodes(3 1 a,3 1b )of the P- and N-channel metal-oxide semiconductor transistors in the pair adjacent to said said functional device (30) are held in relatively positive and negative potential voltages, respectively so that said P- and N-channel metal-oxide semiconductor transistors in said pair adjacent to said functional device are rendered non-conductive so as to electrically isolate said functional device from the remaining portions of the metal-oxide semiconductor integrated circuit device.
Claim 3
Dependent Claim
106 words
A metal-oxide semiconductor integrated circuit device comprising a plurality of pairs of P- and N-channel metal-oxide semiconductor transistors (Qla, Q2a, Q3a, Q4a; Qlb, Q2b, Q3b, Q4b), a group (30) of said pairs being arranged to provide a logic function and being electrically isolated from the other said pairs, characterised in that said group of pairs of transistors is electrically isolated from said other pairs of transistors by a respective one of said other pairs situated adjacent to said group of pairs, said respective one of said other pairs of transistors having gate electrodes (3lla, 311b) which are held in relatively positive and negative potential voltages, respectively.
Claim 4
Dependent Claim
106 words
A metal-oxide semiconductor integrated circuit device comprising a plurality of pairs of P- and N-channel metal-oxide semiconductor transistors (Qla, Q2a, Q3a, Q4a; Qlb, Q2b, Q3b, Q4b), a group (30) of said pairs being arranged to provide a logic function and being electrically isolated from the other said pairs, characterised in that said group of pairs of transistors is electrically isolated from said other pairs of transistors by a respective one of said other pairs situated adjacent to said group of pairs, said respective one of said other pairs of transistors having gate electrodes (3lla, 311b) which are held in relatively positive and negative potential voltages, respectively.
References Cited (Backward Citations)
US3967988A
Cited
US4063274A
Cited
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