EP0103306A2
Expired / Lapsed
EP
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Semiconductor protective device
Assignee: Toshiba Corp
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Filing: 1983-09-14
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Granted: —
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Expires: 2003-09-14
Abstract
Abstract A semiconductor protective device has a semiconductor substrate (1) of one conductivity type, the first island region being of a conductivity type opposite to that of the semiconductor substrate; second and third regions (3, 4) formed in a surface layer of the first region (2) and being of the same conductivity type as that of the semiconductor substrate (1); a first transistor emitter region (5) formed in the surface region of the second region (3) and being of a conductivity type opposite to that of the semiconductor substrate (1); a low-resistance region (6) formed across the second region (3) and the third region (4) ; a first electrode (8) formed on the first transistor emitter region (5); a second electrode (9); a third electrode (10) connected to the second electrode (9) by the low-resistance region (6); a first wiring layer (11) connecting the first electrode (8) and the third electrode (10) and connected to an external terminal, the resistance of the semiconductor region between the first electrode (8) and the first transistor emitter region (5) being lower than that of the semiconductor region between the first electrode (8) and the third electrode (10); and a second wiring layer (12) connected between an internal circuit and the second electrode (9). By a combination of resistors and bipolar transistors, the semiconductor protective device can absorb both positive and negative external surge inputs, thereby protecting the internal circuit.
Inventors
- 👤 Katsuji Fujita
Bibliographic Details
Application Number
—
Jurisdiction
EP
Data Source
google_patents
Last Synchronized
2026-11-08 10:47
CPC Classifications
H; H10; H10D; H10D89/00; H10D89/60; H10D84/00; H10D84/101; H10D84/121; H10D84/125
Claims Analysis
Total Claims: 20
Claim 1
Independent Claim
276 words
A semiconductor protective device formed in a first region (2) formed on a semiconductor substrate (1) of one conductivity type and between an external terminal and an internal circuit formed on the semiconductor substrate having a bipolar transistor as the internal circuit, said first region (2) being of a conductivity type opposite to that of said semiconductor substrate (1), characterized by comprising: second and third regions (3, 4) formed in a . surface layer of said first region (2) and being of the same conductivity type as that of said semiconductor substrate (1); a first transistor emitter region (5) formed in said second region (3) and being of a conductivity type opposite to that of said semiconductor substrate (1); a low-resistance region (6) formed across said second region (3) and said third region (4) and having an impurity concentration higher than that of said second and third regions (2, 3); a first electrode (8) formed on said first transistor emitter region (5); a second electrode (9) connected to that portion of said low-resistance region (6) which is adjacent to said second region (3); a third electrode (10) connected to that portion of said low-resistance region (6) which is adjacent to said third region (4) ; a first wiring-layer (11) connecting said first electrode (8) and said third electrode (10) and connected to said external terminal, the resistance of the semiconductor region between said first electrode (8) and said first transistor emitter region (5) being lower than that of the semiconductor region between the first electrode (8) and said third electrode (10); and a second wiring layer (12) connecting said internal circuit and said second electrode (9).
Claim 2
Dependent Claim
276 words
A semiconductor protective device formed in a first region (2) formed on a semiconductor substrate (1) of one conductivity type and between an external terminal and an internal circuit formed on the semiconductor substrate having a bipolar transistor as the internal circuit, said first region (2) being of a conductivity type opposite to that of said semiconductor substrate (1), characterized by comprising: second and third regions (3, 4) formed in a . surface layer of said first region (2) and being of the same conductivity type as that of said semiconductor substrate (1); a first transistor emitter region (5) formed in said second region (3) and being of a conductivity type opposite to that of said semiconductor substrate (1); a low-resistance region (6) formed across said second region (3) and said third region (4) and having an impurity concentration higher than that of said second and third regions (2, 3); a first electrode (8) formed on said first transistor emitter region (5); a second electrode (9) connected to that portion of said low-resistance region (6) which is adjacent to said second region (3); a third electrode (10) connected to that portion of said low-resistance region (6) which is adjacent to said third region (4) ; a first wiring-layer (11) connecting said first electrode (8) and said third electrode (10) and connected to said external terminal, the resistance of the semiconductor region between said first electrode (8) and said first transistor emitter region (5) being lower than that of the semiconductor region between the first electrode (8) and said third electrode (10); and a second wiring layer (12) connecting said internal circuit and said second electrode (9).
Claim 3
Dependent Claim
61 words
A device according to claim 1, characterized in that said semiconductor substrate (1) is of p conductivity type, said first region (2) is of n conductivity type, said second and third regions (3, 4) are of p conductivity type, said first transistor emitter region (5) is of n + conductivity type, and said low-resistance region (6) is of p conductivity type.
Claim 4
Dependent Claim
60 words
A device according to claim 1, characterized in that said semiconductor substrate (1) is of n conductivity type, said first region (2) is of p conductivity type, said second and third regions (3, 4) are of n conductivity type, said first transistor emitter region (5) is of p conductivity type, and said low-resistance region (6) is of n conductivity type.
Claim 5
Dependent Claim
26 words
A device according to claim 2, characterized in that said first region (2) is set at a positive potential with respect to said semiconductor substrate (1).
Claim 6
Dependent Claim
26 words
A device according to claim 3, characterized in that said first region (2) is set at a negative potential with respect to said semiconductor substrate (1).
Claim 7
Dependent Claim
75 words
A device according to claim 1, characterized in that said second region (3) and said third region (4) are connected to each other to constitute an integral region, said low-resistance region (6) is formed in said second region (3) of said integral region, said low-resistance region has an impurity depth smaller than that of said second region (3), and said second electrode (9) and said third electrode (10) are connected by said low-resistance region (6).
Claim 8
Dependent Claim
82 words
A device according to claim 6, characterized in that said semiconductor substrate (1) is of p conductivity type, said first region (2) is of n conductivity type, said second region (3) is of p conductivity type, said first transistor emitter region (5) is of n conductivity type, said low-resistance region (6) is of n conductivity type, and said second electrode (9) and said third electrode (10) are each formed partly on said second region (3) and partly on said low-resistance region (6).
Claim 9
Dependent Claim
56 words
A device according to claim 6, characterized in that said semiconductor substrate (1) is of p conductivity type, said first region (2) is of n conductivity type, said second region (3) is of p conductivity type, said first transistor emitter region (5) is of n conductivity type, said low-resistance region (6) is of p conductivity type.
Claim 10
Dependent Claim
26 words
A device according to claim 7, characterized in that said first region (2) is set at a positive potential with respect to said semiconductor substrate (1).
Claim 11
Dependent Claim
26 words
A device according to claim 8, characterized in that said first region (2) is set at a positive potential with respect to said semiconductor substrate (1).
Claim 12
Dependent Claim
83 words
A device according to claim 6, characterized in that said semiconductor substrate (1) is of n conductivity type, said first region (2) is of p conductivity type, said second region (3) is of n conductivity type, said first transistor emitter region (5) is of p conductivity type, and said low-resistance region (6) is of p conductivity type, and said second electrode (9) and said third electrode (10) are each formed partly on said second region (3) and partly on said low-resistance region (6).
Claim 13
Dependent Claim
58 words
A device according to claim 6, characterized in that said semiconductor substrate (1) is of n conductivity type, said first region (2) is of p conductivity type, said second region (3) is of n conductivity type, said first transistor emitter region (5) is of p + conductivity type, and said low-resistance region (6) is of n conductivity type.
Claim 14
Dependent Claim
27 words
A device according to claim 11, characterized in that said first region (2) is set at a negative potential with respect to said semiconductor substrate (1) .
Claim 15
Dependent Claim
26 words
A device according to claim 12, characterized in that said first region (2) is set at a negative potential with respect to said semiconductor substrate (1).
Claim 16
Dependent Claim
89 words
A device according to claim 1, characterized in that said second region (3) and said third region (4) are connected to each other to constitute an integral region, said low-resistance region (6) is formed in said second region (3) of said integral region, said low-resistance region (6) has an impurity depth greater than that of said second region (3) and is of same conductivity type as that of said second region (3), and said second electrode (9) and said third electrode (10) are connected by said low-resistance region (6).
Claim 17
Dependent Claim
57 words
A device according to claim 15, characterized in that said semiconductor substrate (1) is of p conductivity type, said first region (2) is of n conductivity type, said second region (3) is of p conductivity type, said first transistor emitter region (5) is of n conductivity type, and said low-resistance region (6) is of p conductivity type.
Claim 18
Dependent Claim
57 words
A device according to claim 15, characterized in that said semiconductor substrate (1) is of n conductivity type, said first region (2) is of p conductivity type, said second region (3) is of n conductivity type, said first transistor emitter region (5) is of p conductivity type, and said low-resistance region (6) is of n conductivity type.
Claim 19
Dependent Claim
26 words
A device according to claim 16, characterized in that said first region (2) is set at a positive potential with respect to said semiconductor substrate (1).
Claim 20
Dependent Claim
26 words
A device according to claim 17, characterized in that said first region (2) is set at a negative potential with respect to said semiconductor substrate (1).
References Cited (Backward Citations)
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