Patent JPS6148148A successfully refreshed from Google Patents.
EP0102696A2
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Dynamic semiconductor memory and manufacturing method thereof
Assignee: Toshiba Corp
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Filing: 1983-06-22
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Granted: —
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Expires: 2003-06-22
Abstract
Abstract A technique is disclosed to prevent dielectric breakdown of a thin gate insulating film (14b) of a memory cell capacitor of a dynamic semiconductor memory device such as a dynamic random access memory. A diffusion layer (18) of an n-conductivity type is formed on a predetermined surface region of a semiconductor substrate (10) of a p-conductivity type so as to form a p-n junction. A polycrystalline semiconductor layer (16') which corresponds to a gate electrode and which is connected to the thin gate insulating film (14b) partially contacts the diffusion layer (18). Thus the polycrystalline semiconductor layer (16') is electrically connected to the substrate (10) through a diode region which is formed of the p-n junction. Abnormal charges stored in the thin gate insulation layer (16') is immediately discharged to the substrate (10).
Inventors
- 👤 Tadashi Shibata
Bibliographic Details
Application Number
—
Jurisdiction
EP
Data Source
google_patents
Last Synchronized
2026-11-05 17:40
CPC Classifications
H; H10; H10B; H10B12/00; H10B12/01; H10B12/02; H10B12/03; H10B12/30; H10D; H10D89/00; H10D89/60; H10D89/601; H10D89/611
Claims Analysis
Total Claims: 19
Claim 1
Independent Claim
122 words
A dynamic semiconductor memory device comprising a semiconductive substrate (10) having a first conductivity type, and a plurality of memory cells which are provided on said substrate (10) and each of which includes a capacitor element, characterized in that said capacitor element comprising an electrical insulative film (14) formed on said substrate (10) and an electrical conductive layer (16', 30) in contact with said insulative film (14), and that said device further comprises discharging means (18, 40, 50, 54, 60) for transferring charges stored in said conductive layer (16', 30) to said substrate (10), thereby preventing dielectric breakdown of said insulative film (14) caused by an electric field established in said insulative film (14) by charging of said conductive layer (16', 30).
Claim 2
Dependent Claim
122 words
A dynamic semiconductor memory device comprising a semiconductive substrate (10) having a first conductivity type, and a plurality of memory cells which are provided on said substrate (10) and each of which includes a capacitor element, characterized in that said capacitor element comprising an electrical insulative film (14) formed on said substrate (10) and an electrical conductive layer (16', 30) in contact with said insulative film (14), and that said device further comprises discharging means (18, 40, 50, 54, 60) for transferring charges stored in said conductive layer (16', 30) to said substrate (10), thereby preventing dielectric breakdown of said insulative film (14) caused by an electric field established in said insulative film (14) by charging of said conductive layer (16', 30).
Claim 3
Dependent Claim
60 words
The device as recited in claim 1, characterized in that said discharging means comprises a first semiconductor layer (18) of a second conductivity type which is formed on a predetermined surface region (S) of said substrate (10), and said conductive layer (16') connected to said insulative film (14) is connected to said substrate (10) through said first semiconductor layer (18).
Claim 4
Dependent Claim
47 words
The device as recited in claim 2, characterized by further comprising a metal layer (26) for receiving a power source voltage to said device and for supplying the power source voltage to said capacitor element, said metal layer (26) being connected directly to said conductive layer (16').
Claim 5
Dependent Claim
98 words
The device as recited in claim 2, characterized by further comprising a metal layer (36, 46) for receiving a power source voltage to said device and for supplying the power source voltage to said capacitor element, said metal layer (36, 46) being connected directly to said first semiconductor layer (18, 40), whereby said metal layer (36, 46) is connected to said conductive layer (30, 16'), which is directly connected to said insulative film (14), through a resistor component (r ) obtained by an ohmic contact between said conductive layer (30, 16') and said first semiconductor layer (18, 40).
Claim 6
Dependent Claim
55 words
The device as recited in claim 2, characterized by further comprising a second semiconductor layer (50) of the first conductivity type formed at a junction region between said substrate (10) and said first semiconductor layer (18), said conductive layer (16') being connected to said substrate (10) through said first and second semiconductor layers (18, 50).
Claim 7
Dependent Claim
66 words
_The device as recited in claim 3 or 4, characterized by further comprising a second semiconductor layer (50, 52, 40) of the first conductivity type formed at a junction region between said substrate (10) and said first semiconductor layer (18, 40), said conductive layer (16') being connected to said substrate (10) through said first semiconductor layer (18, 40) and said second semiconductor layer (50, 52, 54).
Claim 8
Dependent Claim
58 words
The device as recited in claim 1, characterized in that said discharging means comprises a semiconductor layer (60) of the first conductivity type which is formed on a predetermined surface region (S) of said substrate (10), and said conductive layer (16') connected to said insulative film (14) is connected to said substrate (10) through said semiconductor layer (60).
Claim 9
Dependent Claim
36 words
The device as recited in claim 1, characterized in that said discharging means comprises a semiconductor layer (60) of the first conductivity type which is formed on a predetermined surface region (S) of said substrate (10).
Claim 10
Dependent Claim
78 words
The device as recited in claim 8, characterized in that said conductive layer (16') includes a polycrystalline semiconductor layer which has a second conductivity type opposite to the first conductivity type of said semiconductor layer (60) at a first portion (70) thereof which contacts said semiconductor layer (60), and which has the first conductivity type at a second portion (72) thereof which contacts said insulative film (14), whereby a p-n junction is formed in said conductive layer (16').
Claim 11
Dependent Claim
62 words
The device as recited in claim 9, characterized by further comprising a metal layer (26) for receiving a power source voltage for said device and for supplying the power source voltage to said capacitor element, said metal layer (26) being directly connected to said second portion (72) of said polycrystalline semiconductor layer (16') which is directly connected to said insulative film (14).
Claim 12
Dependent Claim
155 words
ll. A method for manufacturing a dynamic semiconductor memory device having a plurality of memory cells each of which has a capacitor element, characterized by comprising the steps of forming an electrical insulative film (14) on a semiconductive substrate (10) of a first conductivity type, said electrical insulative film (14) being used for a dielectric body of said capacitor element of each of said memory cells and having an opening area which is located on a predetermined surface region (S) of said substrate (10); and forming an electrical conductive layer (16, 16', 30) on said insulative film (14) and on said predetermined surface region (S) of said substrate (10), said conductive layer (16, 16', 30) corresponding to a gate electrode and being connected to said predetermined surface region (S) of said substrate (10), thereby discharging, through said predetermined surface region (S), charges stored in said conductive layer (16, 16', 30) during manufacture of said device.
Claim 13
Dependent Claim
155 words
ll. A method for manufacturing a dynamic semiconductor memory device having a plurality of memory cells each of which has a capacitor element, characterized by comprising the steps of forming an electrical insulative film (14) on a semiconductive substrate (10) of a first conductivity type, said electrical insulative film (14) being used for a dielectric body of said capacitor element of each of said memory cells and having an opening area which is located on a predetermined surface region (S) of said substrate (10); and forming an electrical conductive layer (16, 16', 30) on said insulative film (14) and on said predetermined surface region (S) of said substrate (10), said conductive layer (16, 16', 30) corresponding to a gate electrode and being connected to said predetermined surface region (S) of said substrate (10), thereby discharging, through said predetermined surface region (S), charges stored in said conductive layer (16, 16', 30) during manufacture of said device.
Claim 14
Dependent Claim
60 words
The method as recited in claim 11, characterized by further comprising the step of forming a semiconductor layer (18) on said predetermined surface region (S) of said substrate (10), said semiconductor layer (18) having a second conductivity type opposite to the first conductivity type of said substrate (10) and serving to connect said conductive layer (16') and said substrate (10).
Claim 15
Dependent Claim
102 words
The method as recited in claim 11, characterized by further comprising the step of forming a semiconductor layer (60) on said predetermined surface region (S) of said substrate (10), said semiconductor layer (60) having the first conductivity type which is the same as the first conductivity type of said substrate (10) and serving to connect said conductive layer (16') and said substrate (10), whereby the charges which have any one of positive and negative polarities and which are stored in said conductive layer (16') are discharged to said substrate (10) through said semiconductor layer (60) irrespective of the polarity of the charge.
Claim 16
Dependent Claim
45 words
The method as recited in claim 13, characterized by further comprising the insulation step of electrically insulating said conductive layer (16') from said semiconductor layer (60) formed in said substrate (10), after the charges are discharged from said conductive layer (16') to said substrate (10).
Claim 17
Dependent Claim
52 words
The method as recited in claim 14, characterized in that the insulation step includes the step of electrically insulating a first layer component (l6'-l) of said conductive layer (16') which contacts said semiconductor layer (60) from a second layer component (16'-2) of said conductive layer (16') which contacts said insulative film (14).
Claim 18
Dependent Claim
80 words
The method as recited in claim 14, characterized in that the insulation step includes the step of oxidizing a first layer component (64) of said conductive layer (16') of a polycrystalline semiconductor material so as to change the polycrystalline semiconductor material to an electrical insulating material, said first layer component (64) contacting said semiconductor layer (60), whereby a second layer component of said conductive layer (16') which contacts said insulative film (14) is electrically insulated from said semiconductor layer (60).
Claim 19
Dependent Claim
58 words
The method as recited in claim 15, characterized in that said insulation step includes the step of oxidizing a portion (68) of said conductive layer made of a polycrystalline semiconductor material so as to change the polycrystalline semiconductor material to an electrical insulating material, said portion (68) being sandwiched between said first and second layer components (16'-1, 16'-2).
References Cited (Backward Citations)
No citation records indexed.
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