EP0098215A2
Expired / Lapsed
EP
⏱️ 0.0 years remaining
Semiconductor memory device
Assignee: Fujitsu Ltd
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Filing: 1983-06-23
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Granted: —
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Expires: 2003-06-23
Abstract
Abstract A semiconductor memory device including therein control circuits which are at least a switching circuit (44) and program circuits (21) being provided with a constant current source (23'). The switching circuit is mainly comprised of an input side transistor (51) and an output side transistor (52) in the form of a thyristor, both transistors being on only when a write operation is conducted by the program circuits and the constant current source. If no write operation is conducted, these transistors are both off.
Inventors
- 👤 Kouji Ueno
- 👤 Tamio Miyamura
Bibliographic Details
Application Number
—
Jurisdiction
EP
Data Source
google_patents
Last Synchronized
2026-10-27 08:53
CPC Classifications
G; G11; G11C; G11C5/00; G11C5/14; G11C17/00; G11C17/14; G11C17/18
Claims Analysis
Total Claims: 7
Claim 1
Independent Claim
304 words
A semiconductor memory device comprising: a plurality of bit lines; a plurality of word lines; memory cells connected at cross points between the bit lines and word lines; program circuits connected to the bit lines respectively and each being operative to write data to the memory cell when the corresponding bit line is selected; a constant current source for supplying a write current to the program circuit corresponding to the memory cell selected by the bit line; a control terminal for receiving, during the write operation, a program control voltage V to be applied to the constant current source, while receiving, during operations other than the write operation, an input control signal S c; and a switching circuit, located between the control terminal and the constant current source, being operative to supply the program control voltage V p to the constant current source only during the write operation, and further the switching circuit including therein a switching element inserted in a line between the control terminal and the constant current source, which switching element is placed on when the control terminal receiving a signal having a voltage level which exceeds predetermined voltage level of V z higher than the voltage level V sc of the input control signal S c but lower than the voltage level V p of the program control voltage, i. e., V sc < V z < V , and thereby supplying the program control voltage V P to the constant current source, while the switching element is placed off when the control terminal receiving a signal having a voltage level lower than the predetermined voltage level of V z , and thereby a voltage to be supplied to the constant current source is maintained at a level which is not high enough to operate each of the program circuits.
Claim 2
Dependent Claim
304 words
A semiconductor memory device comprising: a plurality of bit lines; a plurality of word lines; memory cells connected at cross points between the bit lines and word lines; program circuits connected to the bit lines respectively and each being operative to write data to the memory cell when the corresponding bit line is selected; a constant current source for supplying a write current to the program circuit corresponding to the memory cell selected by the bit line; a control terminal for receiving, during the write operation, a program control voltage V to be applied to the constant current source, while receiving, during operations other than the write operation, an input control signal S c; and a switching circuit, located between the control terminal and the constant current source, being operative to supply the program control voltage V p to the constant current source only during the write operation, and further the switching circuit including therein a switching element inserted in a line between the control terminal and the constant current source, which switching element is placed on when the control terminal receiving a signal having a voltage level which exceeds predetermined voltage level of V z higher than the voltage level V sc of the input control signal S c but lower than the voltage level V p of the program control voltage, i. e., V sc < V z < V , and thereby supplying the program control voltage V P to the constant current source, while the switching element is placed off when the control terminal receiving a signal having a voltage level lower than the predetermined voltage level of V z , and thereby a voltage to be supplied to the constant current source is maintained at a level which is not high enough to operate each of the program circuits.
Claim 3
Dependent Claim
148 words
A semiconductor memory device as set forth in claim 1, wherein said switching element is mainly comprised of an input side transistor and an output side transistor, both transistors being constructed, as a whole, in the form of a thyristor cooperating with a Zener diode connected to the input side transistor at its base for absorbing a trigger current from said control terminal, the input side transistor being connected to the control terminal, and the output side transistor being connected to said constant current source; said predetermined voltage having the level of V is defined by the Zener diode, whose Zener voltage is higher than the voltage level V sc of said input control signal but lower than the voltage level V of said program control voltage; and a power source voltage V cc is fixedly applied to the base of the input side transistor via a diode.
Claim 4
Dependent Claim
34 words
A semiconductor memory device as set forth in claim 2, wherein said diode for clamping the base of said input side transistor at the V cc level is made of a Schottky barrier diode.
Claim 5
Dependent Claim
63 words
A semiconductor memory device as set forth in claim 3, wherein each of said memory cells is fabricated by NPN transistors operative as a programmable read only memory; a transistor comprising said constant current source is a lateral PNP type transistor; and said input side transistor and said output side transistor are a lateral PNP type transistor and an NPN type transistor, respectively.
Claim 6
Dependent Claim
50 words
A semiconductor memory device as set forth in claim 4, wherein said input side transistor of the lateral PNP type has an enlarged emitter electrode wide enough to cover its base region, said lateral PNP type transistor comprising said constant current source having no such enlarged emitter electrode, as usual.
Claim 7
Dependent Claim
117 words
A semiconductor memory device as set forth in claim 5, wherein the anode of said Zener diode is grounded, while its cathode is connected, via a first resistor, to both the base of said input side transistor and the collector of said output side transistor, the base of the output side transistor being, on one hand, connected to its emitter via a second resistor and, on the other hand, grounded via a third resistor, the intermediate connecting point of these second and third resistors being connected to the input side transistor at its collector, the emitter thereof being connected to said control terminal, the emitter of the output side transistor being connected to said constant current source.
References Cited (Backward Citations)
US4319341A
Cited
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