A method and apparatus for producing a DC balanced (0,4) run length limited rate 8B/10B code from an input data stream

Claim 3

A method as claimed in Claim 1, wherein the encoding of the 5 bit input data sub-block and the 3 bit input data sub-block is performed substantially concurrently.

Claim 4

A method as claimed in Claim 2, including automatically adding an extra bit of a predetermined value to each input sub-block to form each output sub-block, said predetermined value being subject to change if it is determined that a predetermined code pattern in said current input sub-block requires changing said extra bit.

Claim 5

A method as claimed in Claim 3, wherein said alternate code pattern is generated by controlling the complementation of individual bits of said input sub-block and said extra bit in accordance with the logical content thereof to alter same when necessary.

Claim 6

A method as claimed in Claim 4, wherein the selection of the particular input bits to be complemented is accomplished by logically combining individual predetermined bits of said input data sub-block.

Claim 7

A method as claimed in Claim 5, wherein the step of computing the disparity of a current sub-block includes the steps of performing a logic analysis of the input bits of said current sub-block and the output of the bit encoding step to determine the disparity of the current sub-block.

Claim 9

A method as claimed in Claim 7, including factoring said special character indication (K bit) into said bit encoding and disparity determining steps for the 3 bit input sub-block, whereby all of the 4 bit encoded sub-blocks for the special characters have an alternate form which is assigned based solely on a determination of the last non-zero disparity (D-1) sub-block.

Claim 10

A method as claimed in Claim 8, wherein the step of encoding said special character sub-blocks distinctly from encoded data sub-blocks, includes determining if a predetermined run length and disparity is present in the immediately preceding output sub-block and providing a first output sub-block for such special character if said predetermined run length is present and a second output sub-block if said predetermined run length is not present.

Claim 11

A method as claimed in Claim 9, wherein the step of providing said second output sub-block comprises complementing said first output sub-block in accordance with both a run length and disparity determination.

Claim 12

A binary data encoding apparatus for producing a DC balanced (0,4) run length limited rate 8B/10B code from an unconstrained input data stream characterised in that the apparatus includes means for supplying consecutive 8 bit data blocks to said apparatus, means for partitioning the 8 bit input block into two sub-blocks consisting of 5 and 3 contiguous bits, means (12, 14) for testing each input sub-block to determine if any of the individual bits require alteration during encoding and altering predetermined bits based on said determination to produce an alternate code pattern from said input bit pattern, means (16) for determining the disparity (DO) of the current output sub-block being coded, means (16) for determining the disparity (D-1) of the last non-zero sub-block coded and generating a first code pattern as the current output sub-block for certain of the output sub-blocks if the last non-zero disparity sub-block in the output code stream was of a first polarity and means (18) for generating the complement of said first code pattern if the last non-zero disparity sub-block was of the opposite polarity.

Claim 13

A binary data encoding apparatus for producing a DC balanced (0,4) run length limited rate 8B/10B code from an unconstrained input data stream characterised in that the apparatus includes means for supplying consecutive 8 bit data blocks to said apparatus, means for partitioning the 8 bit input block into two sub-blocks consisting of 5 and 3 contiguous bits, means (12, 14) for testing each input sub-block to determine if any of the individual bits require alteration during encoding and altering predetermined bits based on said determination to produce an alternate code pattern from said input bit pattern, means (16) for determining the disparity (DO) of the current output sub-block being coded, means (16) for determining the disparity (D-1) of the last non-zero sub-block coded and generating a first code pattern as the current output sub-block for certain of the output sub-blocks if the last non-zero disparity sub-block in the output code stream was of a first polarity and means (18) for generating the complement of said first code pattern if the last non-zero disparity sub-block was of the opposite polarity.

Claim 14

A data encoding apparatus as claimed in Claim 11, wherein said means for partitioning includes means for gating the 3 bit and 5 bit input data sub-blocks into the encoding apparatus for substantially concurrent encoding.

Claim 15

A data encoding apparatus as claimed in Claim 11 or 12, including means for concatenating an extra bit of a predetermined value at the end of each input data sub-block to form each encoded output sub-block, and means for changing the predetermined value of said extra bit if it is found that a predetermined bit pattern is present in said current data input sub-block.

Claim 16

A data encoding apparatus as claimed in any one of Claims 11 to 13, wherein the means for generating the complement of said first code pattern comprises means for combining the output of said testing means and said disparity determining means do produce a complementation signal which causes the complement of said first code pattern generated by the system to be gated to the output thereof as the encoded output sub-block.

Claim 17

A data encoding apparatus as claimed in Claim 14, wherein said means for complementing includes means for evaluating all of the input data bits of both sub-blocks and also the polarity (negative or positive) of the last non-zero encoded sub-block.

Claim 18

A data encoding apparatus as claimed in any one of Claims 11 to 15, wherein the means for determining the disparity (DO) of the current sub-block includes means for logically combining the input bits of said current sub-block with the output of the testing means to determine if the disparity of the current sub-block (DO) is zero, positive or negative.

Claim 19

A data encoding apparatus as claimed in any one of Claims 11 to 16, including means for indicating that a particular 8 bit input block is a special character outside of the domain of the 256 characters normally representable by the 8 bit input data block and means actuable in response to said indication for producing a specially encoded 4 bit output sub-block from said input 8 bit block whenever such special character indication accompanies a given 8 bit input block.

Claim 20

A data encoding apparatus as claimed in Claim 17, wherein the means for encoding said special character 8 bit sub-block distinctly from a 8 bit data character input sub-block includes means for determining if a predetermined run length is present in the immediately preceding encoded 6 bit output sub-block for the associated 5 bit data input block and for providing a first 4 bit encoded output sub-block for such special character if said predetermined run length is present and a different 4 bit coded output sub-block if said predetermined run length is not present.

Claim 21

A data encoding apparatus as claimed in Claim 18, wherein the means for providing said different 4 bit coded sub-block includes means for complementing said first encoded 4 bit output sub-block.