Claims Analysis
Total Claims: 8
Claim 1
Independent Claim
217 words
An apparatus for dividing one element a i of a Galois field GF(2 m ) consisting of 2 m elements divided into n groups, by another element aj, thus performing a division of: a i + α j (= α i-j ), where a is the root of a modulus polynomial F (X) , said apparatus comprising: reciprocal data memory means (51) storing data representing the reciprocals of n elements located at specific positions respectively in n groups; a first linear shift register (53) for storing data representing the element aj; comparator means (51) for comparing the data stored in said first linear shift register (53) with the data stored in said reciprocal data memory means (51), thereby to deliver the data representing the reciprocal of the data stored in said first linear shift register (53); shifting means (SCK-1) for shifting said first linear shift register (53) N times until said comparator means (51) supplies data that corresponds to any data stored in said reciprocal data memory; and calculating means (54) including means for removing component a- N from the data representing the reciprocal a-(j+N), where 0 ≦ N < n-1, and a second linear shift register (SRO) for multiplying the element a i by the reciprocal α -j of the element aJ (= α i-j ).
Claim 2
Independent Claim
217 words
An apparatus for dividing one element a i of a Galois field GF(2 m ) consisting of 2 m elements divided into n groups, by another element aj, thus performing a division of: a i + α j (= α i-j ), where a is the root of a modulus polynomial F (X) , said apparatus comprising: reciprocal data memory means (51) storing data representing the reciprocals of n elements located at specific positions respectively in n groups; a first linear shift register (53) for storing data representing the element aj; comparator means (51) for comparing the data stored in said first linear shift register (53) with the data stored in said reciprocal data memory means (51), thereby to deliver the data representing the reciprocal of the data stored in said first linear shift register (53); shifting means (SCK-1) for shifting said first linear shift register (53) N times until said comparator means (51) supplies data that corresponds to any data stored in said reciprocal data memory; and calculating means (54) including means for removing component a- N from the data representing the reciprocal a-(j+N), where 0 ≦ N < n-1, and a second linear shift register (SRO) for multiplying the element a i by the reciprocal α -j of the element aJ (= α i-j ).
Claim 3
Dependent Claim
43 words
An apparatus according to claim 1, wherein said means for removing component α -N is designed to shift N times a third linear shift register (52) storing the data representing the element a i , thereby to provide data representing α i+N .
Claim 4
Dependent Claim
48 words
An apparatus according to claim 1, wherein said means for removing component α -N is designed to shift N times a fourth linear shift register (56) storing reciprocal data α -(j+N) read from said reciprocal data memory means (51), thereby to provide data representing α -j-N+N (= a-j).
Claim 5
Dependent Claim
34 words
An apparatus according to claim 1, wherein said reciprocal data memory means (51) and said comparator means (51) are formed by a converter means (51) which includes a decoder (511) and an encoder (512).
Claim 6
Dependent Claim
52 words
An apparatus according to claim 1, wherein said shifting means (SCK-1) comprises a NOR gate (NORl) for detecting an all-zero reciprocal data from said reciprocal data memory means (51) and an AND gate (AND 10 ) for providing a logical product of an output from the NOR gate and a clock signal.
Claim 7
Dependent Claim
30 words
An apparatus according to claim 2, wherein said shifting means (SCK-1) is used to shift said third linear shift register (52) N times, thereby to remove component a- N .
Claim 8
Dependent Claim
29 words
An apparatus according to claim 3, wherein said means for removing component a- N includes a counter (57) for counting signals for shifting said first linear shift register (53).