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EP0094824A2 Expired / Lapsed EP ⏱️ 0.0 years remaining

Image processing device for continuously extracting features of small regions of an image

Assignee: Toshiba Corp
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Filing: 1983-05-16
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Granted: —
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Expires: 2003-05-16
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Abstract

Abstract An image processing device comprises a first register (13) for temporarily storing (Mxn) input picture element data (d i,j ) read serially from a two-dimensionally scanned image having (MxN) picture elements and a second shift register (15) having M stages. A first arithmetic operation circuit (12, 14) effects an arithmetic operation of the input picture element data plus the output data of the second shift register minus the output data of the first shift register, and inputs the operation result to the second shift register. The sum of n consecutive picture elements of each row in an array of (MxN) picture elements is obtained by the first arithmetic operation circuit, and is updated every time a new picture element of the corresponding row is read. A second arithmetic operation circuit (17, 19) is provided to effect an airthmetic operation of the output data of the first arithmetic operation circuit plus the output data of a third register (18) minus the output data of m-th stage of the second register and inputs the operation result to the third register. The accumulated sum of the picture element data of a small area having (mxn) picture elements is obtained by the second arithmetic operation circuit, and is updated every time new picture element data is read, thereby obtaining the accumulated sum of new (mxn) picture element data. Since the small area having (mxn) picture elements is shifted each time the new picture element is read, the feature of each small region can be accurately extracted. The picture element data may be a binary signal or a multi-valued signal

Inventors

  • 👤 Shou Tsunekawa

Bibliographic Details

Application Number —
Jurisdiction EP
Data Source google_patents
Last Synchronized 2026-11-01 01:32
CPC Classifications
G; G06; G06T; G06T7/00; G01; G01N; G01N21/00; G01N21/84; G01N21/88; G01N21/89

Claims Analysis

Total Claims: 9
Claim 1
Independent Claim 255 words
An image data processing device for extracting the feature of a small region of an image comprising: first memory means (13) connected to sequentially receive input picture element data (di, j ) obtained by two-dimensional scanning of the image for temporarily storing the data, said first memory means having (Mxn) stages to temporarily store (Mxn) picture element data on n scanning lines, the (Mxn) picture element data stored being sequentially read out of said first memory means in the order of application of said picture element data to said memory means; second memory means (15) having M stages for temporarily storing data sequentially applied to an input thereof, the M data stored being read out of said second memory means in the order of application of data thereto; first arithmetic operation circuit means (12, 14) for effecting an arithmetic operation of the input picture element data plus the output data of said second memory means (15) minus the output data of said first memory means (13) and coupling its output data to the input of said second memory means (15); third memory means (18) for temporarily storing data applied to an input thereof; and second arithmetic operation circuit means (17, 19) for effecting an arithmetic operation of the output data of said first arithmetic operation circuit means (12, 14) plus output data of said third memory means (18) minus output data of m (<M)-th stage of said second memory means (15) and coupling its output data to the input of said third memory means (18).
Claim 2
Dependent Claim 255 words
An image data processing device for extracting the feature of a small region of an image comprising: first memory means (13) connected to sequentially receive input picture element data (di, j ) obtained by two-dimensional scanning of the image for temporarily storing the data, said first memory means having (Mxn) stages to temporarily store (Mxn) picture element data on n scanning lines, the (Mxn) picture element data stored being sequentially read out of said first memory means in the order of application of said picture element data to said memory means; second memory means (15) having M stages for temporarily storing data sequentially applied to an input thereof, the M data stored being read out of said second memory means in the order of application of data thereto; first arithmetic operation circuit means (12, 14) for effecting an arithmetic operation of the input picture element data plus the output data of said second memory means (15) minus the output data of said first memory means (13) and coupling its output data to the input of said second memory means (15); third memory means (18) for temporarily storing data applied to an input thereof; and second arithmetic operation circuit means (17, 19) for effecting an arithmetic operation of the output data of said first arithmetic operation circuit means (12, 14) plus output data of said third memory means (18) minus output data of m (<M)-th stage of said second memory means (15) and coupling its output data to the input of said third memory means (18).
Claim 3
Dependent Claim 57 words
An image data processing device according to claim 1, characterized by further comprising: means (20, 21) for selecting one of (integral multiples of M)-th stages of said first memory means (13) and coupling, as the output data of said first memory means, output data of the selected stage to said first arithmetic operation circuit means (12, 14).
Claim 4
Dependent Claim 55 words
An image data processing device according to claim 1, characterized by further comprising: means (22, 23) for selecting one of a plurality of stages of said second memory means (15) and coupling, as the output data of said second memory means, output data of the selected stage to said second arithmetic operation circuit (17, 19).
Claim 5
Dependent Claim 22 words
An image data processing device according to claim 1, characterized in that said input picture element data (di,j) is a binary signal.
Claim 6
Dependent Claim 24 words
An image data processing device according to claim 1, characterized in that said input picture element data (d i-j ) is a multi-valued signal.
Claim 7
Dependent Claim 24 words
An image data processing device according to claim 1, characterized in that said first memory means (13) is a shift register having (Mxn) stages.
Claim 8
Dependent Claim 21 words
An image data processing device according to claim 1, characterized in that said second memory means (15) is a shift register.
Claim 9
Dependent Claim 33 words
An image data processing device according to claim 1, characterized in that said first and second arithmetic operation circuit means each have an adder circuit (12, 17) and a subtractor circuit (14, 19).

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