EP0093954A2
Expired / Lapsed
EP
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Image display memory unit
Assignee: Hitachi Ltd
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Filing: 1983-04-27
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Granted: —
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Expires: 2003-04-27
Abstract
Abstract An image display memory unit having a plurality of display memories (6, 7, 8) connected to a plurality of data lines of data bus (3) one for each display memory chip and addressable for each bit of the data bus comprises a display memory chip selection circuit (13) for selecting the display memory chip for each data bit on the same address, and a write control circuit (16, 17, 18) for controlling writing for each display memory. The dot-by-dot coloring is attained only by a software processing of controlling write information for each display memory and selecting the display memory chip.
Inventors
- 👤 Tetsuya Ikeda
- 👤 Shigeru Komatsu
- 👤 Shigeru Hirahata
- 👤 Tokuo Koyama
Bibliographic Details
Application Number
—
Jurisdiction
EP
Data Source
google_patents
Last Synchronized
2026-10-24 19:36
CPC Classifications
G; G09; G09G; G09G5/00; G09G5/02; G09G5/022
Claims Analysis
Total Claims: 4
Claim 1
Independent Claim
85 words
An image display memory unit having a CPU (1) and a plurality of display memories (6, 7, 8) connected to a plurality of data lines (3) of said CPU one for each display memory chip and addressable for each bit of said data lines, comprising: display memory chip selection means (13) for selecting each of the display memory chips connected to the data lines of said CPU; and display memory write control means (16, 17, 18) for controlling writing for each of said display memories.
Claim 2
Dependent Claim
85 words
An image display memory unit having a CPU (1) and a plurality of display memories (6, 7, 8) connected to a plurality of data lines (3) of said CPU one for each display memory chip and addressable for each bit of said data lines, comprising: display memory chip selection means (13) for selecting each of the display memory chips connected to the data lines of said CPU; and display memory write control means (16, 17, 18) for controlling writing for each of said display memories.
Claim 3
Dependent Claim
21 words
An image display memory unit according to Claim 1 wherein said display memory write control means controls writing for each bit.
Claim 4
Dependent Claim
23 words
An image display memory unit according to Claim 1 wherein said display memory write means controls simultaneous writing of a plurality of bits.
References Cited (Backward Citations)
No citation records indexed.
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