EP0089891A2
Expired / Lapsed
EP
⏱️ 0.0 years remaining
Identification of repaired integrated circuits
Assignee: Fairchild Semiconductor Corp
•
Filing: 1983-03-18
•
Granted: —
•
Expires: 2003-03-18
Abstract
Abstract A circuit for providing an identification signal indicative of whether or not an integrated circuit has been repaired includes a circuit which operates at potentials outside the normal range of the integrated circuit. The circuit includes at least one transistor T1 serially connected between a TTL pin 10 of the integrated circuit and a fuse F1. The fuse F1 is also connected to a potential source V cc . If the integrated circuit is repaired the fuse F1 is opened, and consequently, application of a potential outside the normal range will cause current to flow if fuse F1 has not been opened, and cause no current to flow if fuse F1 has been opened.
Inventors
- 👤 Ramesh C. Varshney
- 👤 Robert J. Strain
Bibliographic Details
Application Number
—
Jurisdiction
EP
Data Source
google_patents
Last Synchronized
2026-11-04 07:41
CPC Classifications
G; G11; G11C; G11C29/00; G11C29/70; G11C29/78; G11C29/835; H; H10; H10W; H10W20/00; H10W20/40; H10W20/49; H10W20/493; H10W20/494; H10W46/00; H10W46/601
Claims Analysis
Total Claims: 12
Claim 1
Independent Claim
159 words
Apparatus for providing an identification signal indicative of the presence or absence of a feature in an integrated circuit, characterized by comprising : a'first connection (10, 15, 20) to the integrated circuit which has a selected operating range of potentials; 'a second connection to the integrated circuit for being connected to a potential source (Vcc, ground); fusing means (Fl, F2, F3) coupled to one of the first connection and the second connection for providing a conducting path if the fusing means is in a first state, and providing no conducting path if the fusing means is in a second state; and circuit means coupled to the fusing means and to the other of the first connection and the second connection, whereby application of a selected test potential outside the selected operating range results in a first signal if the fusing means is in the first state and a second signal if the fusing means is in the second state.
Claim 2
Dependent Claim
159 words
Apparatus for providing an identification signal indicative of the presence or absence of a feature in an integrated circuit, characterized by comprising : a'first connection (10, 15, 20) to the integrated circuit which has a selected operating range of potentials; 'a second connection to the integrated circuit for being connected to a potential source (Vcc, ground); fusing means (Fl, F2, F3) coupled to one of the first connection and the second connection for providing a conducting path if the fusing means is in a first state, and providing no conducting path if the fusing means is in a second state; and circuit means coupled to the fusing means and to the other of the first connection and the second connection, whereby application of a selected test potential outside the selected operating range results in a first signal if the fusing means is in the first state and a second signal if the fusing means is in the second state.
Claim 3
Dependent Claim
59 words
Apparatus as in claim 1, characterized in that the circuit means comprises one MOS transistor (T2, T3, T5) which includes a gate, a source and a drain, one of the source and the drain being serially connected to the fusing means (Fl, F 2, F3) and the gate being coupled to the other of the source and the drain.
Claim 4
Dependent Claim
32 words
Apparatus as in claim 2, characterized .in that the gate is connected to the second connection and the fusing means ( F 2, F3) is connected to the first connection (15, 20).
Claim 5
Dependent Claim
15 words
Apparatus as in claim 3, characterized in that the second connection is connected to ground.
Claim 6
Dependent Claim
28 words
Apparatus as in claim 2, characterized in that the gate is connected to the first connection (10) and the fusing means (Fl) is coupled to the second connection.
Claim 7
Dependent Claim
20 words
Apparatus as in claim 3 or 5, characterized in that the second connection is coupled to a power supply (Vcc).
Claim 8
Dependent Claim
33 words
Apparatus as in any one of claims 2 to 6, characteri.zed in that the circuit means further comprises at least an-other transistor (Tl, T4, T7) serially connected with said one transistor (T2, T5).
Claim 9
Dependent Claim
39 words
Apparatus as in claim 7, characterized in that the circuit means comprises first, second, and third transistors (T5, T 4, T7) serially connected and a fourth transistor (T6) coupled in parallel to the first and second transistors (T5, T4).
Claim 10
Dependent Claim
56 words
Apparatus as in claim 8, characterized in that the gate of the second and third transistors (T4, T7) are coupled to ground, the gate of the fourth transistor (T6) is coupled between the first and second transistors (T5, T4) and the gate of the first transistor (T5) is coupled to the at least one second connection.
Claim 11
Independent Claim
115 words
A method of identifying the presence or absence of a feature in an integrated circuit operational over a selected range of potentials, characterized by comprising: including within the integrated circuit a circuit responsive only to signals outside the selected range of potentials, the circuit including fusing means (Fl, F2, F3) which causes the circuit to operate in a first manner if the fusing means is in a first state and-causes the circuit to operate in a second manner if the fusing means is in a second state; and placing the fusing means (Fl, F2, F3) in one of the first or second states to correspond to one of the presence or absence of the feature.
Claim 12
Independent Claim
115 words
A method of identifying the presence or absence of a feature in an integrated circuit operational over a selected range of potentials, characterized by comprising: including within the integrated circuit a circuit responsive only to signals outside the selected range of potentials, the circuit including fusing means (Fl, F2, F3) which causes the circuit to operate in a first manner if the fusing means is in a first state and-causes the circuit to operate in a second manner if the fusing means is in a second state; and placing the fusing means (Fl, F2, F3) in one of the first or second states to correspond to one of the presence or absence of the feature.
References Cited (Backward Citations)
No citation records indexed.
USPTO Annuity & Maintenance Windows
Maintenance schedule is calculated for granted US utility patents.