EP0089814A2
Expired / Lapsed
EP
⏱️ 0.0 years remaining
Method of forming fusible links in a semiconductor device
Assignee: Fujitsu Ltd
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Filing: 1983-03-17
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Granted: —
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Expires: 2003-03-17
Abstract
Abstract A method of producing a semiconductor device provided with a fuse comprises the steps of forming a fuse layer (34) on an insulating layer (32) lying on a semiconductor substrate (31); forming an interrupting layer (40) covering the fuse layer and the insulating layer; forming an insulating protective layer (43) covering the interrupting layer; selectively etching the protective layer, so as to form a partial window (55), with a suitable etchant which does not etch the interrupting layer (40); and etching the exposed interrupting layer to complete the window (56) through which a portion of the fuse layer (34) and a portion of the insulating layer (32) are exposed. The insulating layer (32) is not removed, so that the reliability of the semiconductor device will not deteriorate.
Inventors
- 👤 Takashi Yabu
- 👤 Masao Kanazawa
Bibliographic Details
Application Number
—
Jurisdiction
EP
Data Source
google_patents
Last Synchronized
2026-10-29 15:34
CPC Classifications
H; H10; H10W; H10W20/00; H10W20/40; H10W20/49; H10W20/493; H10W20/494
Claims Analysis
Total Claims: 9
Claim 1
Independent Claim
98 words
A method of producing a semiconductor device, characterised by the steps of forming a fuse layer (34) on an insulating layer (32); forming an interrupting layer (40) which interrupts the etching process and which covers the fuse layer and the insulating layer; forming an insulating protective layer (43) covering the interrupting layer; selectively etching the insulating protective layer to form a partial window (55); and selectively etching the interrupting layer to complete the window (56) by which a portion of the fuse layer and a portion of the insulating layer adjacent to the fuse layer portion are exposed.
Claim 2
Independent Claim
98 words
A method of producing a semiconductor device, characterised by the steps of forming a fuse layer (34) on an insulating layer (32); forming an interrupting layer (40) which interrupts the etching process and which covers the fuse layer and the insulating layer; forming an insulating protective layer (43) covering the interrupting layer; selectively etching the insulating protective layer to form a partial window (55); and selectively etching the interrupting layer to complete the window (56) by which a portion of the fuse layer and a portion of the insulating layer adjacent to the fuse layer portion are exposed.
Claim 3
Dependent Claim
20 words
A method according to Claim 1, characterised in that the interrupting layer (40) comprises a conductor layer for interconnecting electrodes.
Claim 4
Dependent Claim
35 words
A method according to Claim 1 or Claim 2, characterised in that after the step of forming the fuse layer (34),another insulating layer (37) is formed between the fuse layer and the interrupting layer (40).
Claim 5
Independent Claim
41 words
A method according to any preceding claim, characterised in that the step of forming the interrupting layer (40) comprises a step of patterning the interrupting layer so that it has an island-like shape and is larger than the partial window (55).
Claim 6
Dependent Claim
18 words
A method according to Claim 2, characterised in that the conductor layer (40) is made of polycrystalline silicon.
Claim 7
Dependent Claim
19 words
A method according to Claim 2, characterised in that the conductor layer (40) is made of a metal silicide.
Claim 8
Independent Claim
139 words
A method of producing a semiconductor device, characterised by the steps of forming a polycrystalline silicon fuse layer (34) on a first insulating layer (32); forming a second insulating layer (37) on the fuse layer (34); depositing a second polycrystalline silicon layer (40) on the second insulating layer (37) and on the first insulating layer (32); patterning the second polycrystalline silicon layer (40) to leave the patterned polycrystalline silicon layer over the fuse layer (34); forming an insulating protective layer (43) covering the patterned second polycrystalline silicon layer (40); etching a portion of the protective layer (43) above the region in which the fuse is formed; etching a thereby exposed portion of the second polycrystalline silicon layer (40); and etching a thereby exposed portion of said second insulating layer (37) to expose a portion of the fuse layer (34).
Claim 9
Independent Claim
139 words
A method of producing a semiconductor device, characterised by the steps of forming a polycrystalline silicon fuse layer (34) on a first insulating layer (32); forming a second insulating layer (37) on the fuse layer (34); depositing a second polycrystalline silicon layer (40) on the second insulating layer (37) and on the first insulating layer (32); patterning the second polycrystalline silicon layer (40) to leave the patterned polycrystalline silicon layer over the fuse layer (34); forming an insulating protective layer (43) covering the patterned second polycrystalline silicon layer (40); etching a portion of the protective layer (43) above the region in which the fuse is formed; etching a thereby exposed portion of the second polycrystalline silicon layer (40); and etching a thereby exposed portion of said second insulating layer (37) to expose a portion of the fuse layer (34).
References Cited (Backward Citations)
No citation records indexed.
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