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EP0089797A2 Expired / Lapsed EP ⏱️ 0.0 years remaining

Digital image information compression and decompression method and apparatus

Assignee: Olivetti SpA
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Filing: 1983-03-15
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Granted: —
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Expires: 2003-03-15
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Abstract

Abstract One-dimensional compression is effected by addressing a first ROM (62) with information in respect of the length and the type of run. One-dimensional decompression is effected by addressing with the compressed code, a second ROM, bearing the information in respect of the runs and the length of the code. That is provided by a shift register controlled by a logic unit capable of recognising a group of least significant bits, to permit additional shifting of the register, and addressing of the second ROM with a bit number less than the maximum length of the codes. For two-dimensional compression or decompression, there is provided a pair of RAMS for temporarily storing a reference line which, together with the current line, actuates a logic means (38), for controlling coding and decoding of the latter. For compression of the medium tones, besides the runs of the two colours, coding is effect in respect of the runs of the alternations of the two colours defined on the basis of the colour of the initial pixel, and the type of the successive run is defined. Besides the coding and decoding for two- colour images, the two ROMs also carry the coding and decoding for images with the half-tones. Finally, the apparatus comprises an archive memory which can be connected to the compression module for achival storage of the images with the maximum degree of compression. By instead connecting the decompression module between the archive memory and the compression module, the image can be transmitted with a type of compression compatible with the receiving station.

Inventors

  • 👤 Mario Caneschi
  • 👤 Giorgio Tadini

Bibliographic Details

Application Number —
Jurisdiction EP
Data Source google_patents
Last Synchronized 2026-11-01 15:03
CPC Classifications
H; H03; H03M; H03M7/00; H03M7/30; H03M7/40; H03M7/42; H04; H04N; H04N1/00; H04N1/21; H04N1/2166; H04N1/41; H04N1/4105; H04N1/411; H04N1/413; H04N1/417; H04N1/4175

Claims Analysis

Total Claims: 32
Claim 1
Independent Claim 118 words
Apparatus for the compression and decompression of digital image information, wherein a run of a given length of pixels of:the same type is compressed by addressing a first read only memory (62) which carries the binary one-dimensional compression codes, and wherein the codes are decompressed by addressing a second read only memory (75) which carries the corresponding information in respect of the type of pixels and the run length, characterised by storage means (26, 27; 71, 72) for temporarily storing the information in respect of a preceding line for actuating the control means co-operating with the first and second memories (62 and 75) in such a way as to control the two-dimensional compression and decompression of the information.
Claim 2
Dependent Claim 118 words
Apparatus for the compression and decompression of digital image information, wherein a run of a given length of pixels of:the same type is compressed by addressing a first read only memory (62) which carries the binary one-dimensional compression codes, and wherein the codes are decompressed by addressing a second read only memory (75) which carries the corresponding information in respect of the type of pixels and the run length, characterised by storage means (26, 27; 71, 72) for temporarily storing the information in respect of a preceding line for actuating the control means co-operating with the first and second memories (62 and 75) in such a way as to control the two-dimensional compression and decompression of the information.
Claim 3
Dependent Claim 75 words
Apparatus according to claim 1, characterised in that the storage means comprise two reading and writing memory sections (26,27; 71,72) each being capable of storing a line, (28,29,31; 74,76,77) for controlling the flow of data, for simultaneously actuating the writing mode in one section and the reading mode in the other section, and means (32; 73) for detecting the line end for conditioning the flow control means xto alternate the functions of the two sections.
Claim 4
Dependent Claim 86 words
Apparatus according to claim 2, characterised in that a shift circuit (33) is arranged to receive the signals of the pixels read, for conditioning means (35,36, 37) for forming an address, in such a way as to address the first memory (62) for loading the compression code in a shift register (67), a circuit (61) for controlling the output (66,68) for controlling the output of the code being provided to permit the discharge from the register only of the number of bits of the code extracted.
Claim 5
Dependent Claim 44 words
Apparatus according to claim 3 characterised in that the address forming means comprise a pixel counter (36) which is capable of being zeroed every time by a run end detection circuit (35) which determines the timing (FR) for reading of the first memory (62).
Claim 6
Dependent Claim 53 words
Apparatus according to claim 3 or 4, characterised in that the address forming means comprise a circuit (.39,41) for forming the mode addresses, which is controlled by a logic circuit (38) for defining the colour transitions in the current line and in the reference line and detecting the mode required by two-dimensional compression.
Claim 7
Dependent Claim 64 words
Apparatus according to claim 5, characterised by logic definition-varying means (58) which can be set in a condition on the basis of the definition of the pixels for periodically alternating the lines which are comrpessed on the basis of the addresses given by the said counter (36) with those compressed on the basis of the addresses given by the mode address forming circuit (39,41).
Claim 8
Dependent Claim 47 words
Apparatus according to any of claims 2 to 6, characterised in that the second memory (75) is addressed by a shift register (83) for receiving the compressed codes, the shift of the register being actuated by logic means (84,91) controlled by the output of the second memory.
Claim 9
Dependent Claim 53 words
Apparatus according to claim 7, characterised in that the second memory (75) comprises a first section (78) for supplying the length of the decompressed run and a second section (79) for supplying the number of bits of the code forming the address, the two sections being simultaneously addressed by the said register (83).
Claim 10
Dependent Claim 29 words
Apparatus according to claim 8, characterised in that the logic means (84,91) are controlled by a counter (82) loaded by the second section (79) of the second memory (73).
Claim 11
Dependent Claim 78 words
Apparatus according to claim 7 or 8, characterised in that the second memory (75) has a number of inputs (AO-A10) lower than the maximum number of bits of the codes the logic means (84,91) comprise means (85,87,94) for recognising a group of least significant bits of a code to replace same by a smaller number of address bits (A9, A'9, A10) and to condition the logic means to cause additional shift (S D ) of the register (83).
Claim 12
Dependent Claim 42 words
Apparatus according to claim 10, characterised in that each group of least significant bits is represented by at least three identical bits of the runs of a predetermined type, the logic means (84) replacing the three bits by a single address bit.
Claim 13
Dependent Claim 48 words
Apparatus according to claim 10 or 11, characterised in that when said recognising means (85, 87,94) recognise a group of bits, they define a bit of the address and condition recognition of another group of bits to replace the address bit by a predetermined bit of the code.
Claim 14
Dependent Claim 45 words
Apparatus according to any of claims 6 to 12 characterised in that a code emitting circuit (96) is controlled by means for receiving the decoding information from the second memory (75), comprising a counter (93) for receiving the length of the run to be decompressed.
Claim 15
Dependent Claim 70 words
Apparatus according to claim 13, wherein the run lengths, if less than a predetermined length value, can be coded with a single code TC and, if greater than the said length, can be coded with a code MK associated with a whole multiple of the said value and added to a code TC, characterised in that the second memory (75) outputs information for indicating whether TC or MK are involved.
Claim 16
Dependent Claim 40 words
Apparatus according to claim 14, characterised by a staticising circuit (82) for staticising the decoding of a code MK, and in that the counter (93) sums the content of the staticising circuit with the decoding of a subsequent code TC.
Claim 17
Dependent Claim 39 words
Apparatus according to any of claims 13 to 15, characterised by a register (97) for passing the information emitted by the code emitting circuit (96) to the storage means (71,72) temporarily storing each decompressed line as a reference line.
Claim 18
Dependent Claim 62 words
Apparatus according to claim 8 and claim 16, characterised in that the second section (79) of the second memory (75). is capable of producing decoding of a mode code, comparison means (103) being provided for comparing the decoding of the mode code to the reference line and consequently conditioning an output logic circuit (98) for generating decompressed runs from a two-dimensional code.
Claim 19
Independent Claim 100 words
A method for the compression and decompression of digital image information, for indicating at least two separate colours and a half- tone colour, wherein a code representing a run of pixels can be formed from pixels which are all of one or the other of two colours or from a-medium tone run formed by an alternation of pixels of the two colours, characterised in that coding is effected separately in respect of a first medium-tone run which begins with one colour and a second medium-tone run which begins with the other colour, whereby there are four different types of run.
Claim 20
Independent Claim 100 words
A method for the compression and decompression of digital image information, for indicating at least two separate colours and a half- tone colour, wherein a code representing a run of pixels can be formed from pixels which are all of one or the other of two colours or from a-medium tone run formed by an alternation of pixels of the two colours, characterised in that coding is effected separately in respect of a first medium-tone run which begins with one colour and a second medium-tone run which begins with the other colour, whereby there are four different types of run.
Claim 21
Dependent Claim 53 words
A method according to claim 18 characterised in that the runs which are less in length than a certain value are represented in respect of each type by a series of codes having a variable number of bits, such that no least significant part of a code is .a code of the series.
Claim 22
Dependent Claim 59 words
Apparatus for carrying out a compression and decompression method according to claim 18 or 19, characterised by means (35) for recognising the half-tone runs, and in that, for.the compression process, there is provided a first read-only memory (62) capable of being addressed with the information of each length of run of the said types for providing the said code.
Claim 23
Dependent Claim 37 words
Apparatus according to claim 20,characterised in that the medium-tone runs are all of a length given by an even number of pixels, each half-tone run being associated with the colour of the initial pixel of the run.
Claim 24
Dependent Claim 68 words
Apparatus according to claim 5 and claim 21 characterised in that the logic circuit (38) is capable of defining the colour transitions between the four types of run and comprises means for recognising the type of run subsequent to a half -tone run and coding an additional bit (ADG) according to whether the colour of the subsequent run is or is not associated with the current meidum-tone run.
Claim 25
Dependent Claim 46 words
Apparatus according to claim 17 and claim 22, characterised in that the output logic circuit (98) comprises means (100) for controlling the alternation of the colours which are controlled by the comparison means (103) to cause the code emitting circuit (86) to emit the medium-tone runs.
Claim 26
Dependent Claim 104 words
24'. Apparatus according tb any of claims 1 to 17 and any of claims 18 to 23, characterised in that the first memory (62) comprises two portions, one (63,64) for compression of runs of only two types and the other (63', 64') for compression of runs of four different types and that the second memory (75) also comprises two portions, one (78,79) for compression of runs of only two types and the other (78', 79') for decompression of runs of four different types, selecting means being provided to enable compression and decompression according to one or other of the two portions of each memory.
Claim 27
Dependent Claim 94 words
Image compression and decompression apparatus comprising a compression module (16), a decompression module (23), a memory (17) for archival storage of compressed images, and an image transmission unit (18) for transmitting the images which are compressed, with a predetermined degree of compression, characterised in that the decompression module (25) is capable of decompressing an image which is in archival storage in the memory (17) wiht a degree of compression higher than the predetermined degree, and can be connected to the compression module (11) for compressing with the predetermined degree for the transmission unit (18).
Claim 28
Dependent Claim 94 words
Image compression and decompression apparatus comprising a compression module (16), a decompression module (23), a memory (17) for archival storage of compressed images, and an image transmission unit (18) for transmitting the images which are compressed, with a predetermined degree of compression, characterised in that the decompression module (25) is capable of decompressing an image which is in archival storage in the memory (17) wiht a degree of compression higher than the predetermined degree, and can be connected to the compression module (11) for compressing with the predetermined degree for the transmission unit (18).
Claim 29
Dependent Claim 113 words
Apparatus according to claim 26, characterised in that the said modules (16,23) can be selectively preset in such a way as to operate at least in accordance with one of the said two degrees of compression to first preset the compression module (16) for the higher degree of compression and connect it to the memory (17), and to subsequently preset the compression module for the said predetermined degree of compression and connect it to the transmission unit (18), the decompresison module (23) being simlutaneously preset for the higher degree of compression and being connected so as to decompressthe image stored in the memory (17) and pass the decompressed image to the compression module.
Claim 30
Dependent Claim 135 words
Apparatus fordecompressing digital image information representing runs of pixels of variable length, which are coded with a code such that no least significant part of a code is itself a code, comprising a read only memory (75) for being addressed by the codes, characterised in that the memory (75) is addressed by a shift register (73) capable of serially receiving the bits of each code and being shifted from time to time by the number of bits of the code, the memory having a number of address inputs (AO-AIO) less than the maximum number of bits of the code, logic means (84) being provided to recognise a gorup of least significant bits of a code to replace the same by a smaller number of address bits and to cause an additional shift of the register.
Claim 31
Dependent Claim 135 words
Apparatus fordecompressing digital image information representing runs of pixels of variable length, which are coded with a code such that no least significant part of a code is itself a code, comprising a read only memory (75) for being addressed by the codes, characterised in that the memory (75) is addressed by a shift register (73) capable of serially receiving the bits of each code and being shifted from time to time by the number of bits of the code, the memory having a number of address inputs (AO-AIO) less than the maximum number of bits of the code, logic means (84) being provided to recognise a gorup of least significant bits of a code to replace the same by a smaller number of address bits and to cause an additional shift of the register.
Claim 32
Dependent Claim 45 words
Apparatus according to claim 28, characterised in that the group of least significant bits are represented by at least three identical bits of the runs of a predetemrined type, the logic means replacing said three bits by a single address bit (A9, A'9 or AlO).

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