EP0088291A1
Expired / Lapsed
EP
⏱️ 0.0 years remaining
MOS switch circuit
Assignee: Toshiba Corp
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Filing: 1983-02-23
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Granted: —
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Expires: 2003-02-23
Abstract
Abstract The invention provides an inverting amplifier having a CMOS inverter (34) and a MOSFET (36), the latter being . connected to an input-output path of the CMOS inverter (34) to autozero the CMOS inverter (34) to its toggle point upon being turned on. An output signal from a CMOS inverter (40, 42) which has a short-circuited input-output path is supplied to the back gate of the MOSFET (36). Even if a gate threshold voltage of the MOSFET (36) varies, its ON resistance is kept substantially constant.
Inventors
- 👤 Eiji Masuda
- 👤 Kenji Matsuo
Bibliographic Details
Application Number
—
Jurisdiction
EP
Data Source
google_patents
Last Synchronized
2026-10-31 23:09
CPC Classifications
H; H03; H03K; H03K5/00; H03K5/22; H03K5/24; H03K5/2472; H03K5/249; H03K17/00; H03K17/06; H03K17/51; H03K17/56; H03K17/687; H03K17/6871; H03K17/6872; H03K19/00; H03K19/003; H03K19/00369; H03K19/00384; H03K2217/00; H03K2217/0018
Claims Analysis
Total Claims: 7
Claim 1
Independent Claim
49 words
An MOS switch circuit having an MOS transistor (36) which has a gate electrode and a back gate electrode, characterized by further comprising biasing means (38) for supplying a voltage corresponding to a threshold voltage of said MOS transistor (36) to said back gate electrode of said MOS transistor.
Claim 2
Dependent Claim
49 words
An MOS switch circuit having an MOS transistor (36) which has a gate electrode and a back gate electrode, characterized by further comprising biasing means (38) for supplying a voltage corresponding to a threshold voltage of said MOS transistor (36) to said back gate electrode of said MOS transistor.
Claim 3
Dependent Claim
30 words
A circuit according to claim 1, characterized in that said biasing means (38) has an MOS transistor (42, 104, 108) which has the same channel as said MOS transistor (36).
Claim 4
Dependent Claim
23 words
A circuit according to claim 1, characterized in that said biasing means (38) comprises a CMOS inverter which has a short-circuited input-output path.
Claim 5
Dependent Claim
60 words
A circuit according to claim 2, characterized in that said biasing means (38) comprises a constant current source (100) which is connected between a first reference voltage end and an output end, and an MOS transistor (104) which is connected between a second reference voltage end and said output end and which has a gate connected to said output end.
Claim 6
Dependent Claim
58 words
A circuit according to claim 2, characterized in that said biasing means (38) comprises a resistor (106) which is connected to a first reference voltage end and an output end, and an MOS transistor (108) which is connected between a second reference voltage end and said output end and which has a gate connected to said output end.
Claim 7
Dependent Claim
50 words
A circuit according to claim 1, characterized in that said MOS transistor (36) comprises a CMOS transistor (110), and said biasing means comprises two CMOS inverters (116, 118) which have short-circuited input-output paths which are connected to back gates of first and second channels of said CMOS transistor (110), respectively.
References Cited (Backward Citations)
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