EP0083209A2
Expired / Lapsed
EP
⏱️ 0.0 years remaining
A microcomputer for processing instructions of different types
Assignee: Fujitsu Ltd
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Filing: 1982-12-23
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Granted: —
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Expires: 2002-12-23
Abstract
Abstract A method for enciphering and deciphering instructions in a microcomputer and a microcomputer for effecting the same, wherein, an instruction is coded into at least two types of instruction codes and stored in a storage unit and wherein, under the control of discriminating circuit for discriminating the coded format, each instruction code is decoded by one of at least two decoders in accordance with one of at least two decoding formats, whereby the stored software is prevented from being learned by third persons.
Inventors
- 👤 Haruhiko Nakamura
Bibliographic Details
Application Number
—
Jurisdiction
EP
Data Source
google_patents
Last Synchronized
2026-10-30 03:08
CPC Classifications
G; G06; G06F; G06F21/00; G06F21/70; G06F21/71; G06F21/72; G06F21/10; G06F21/12; G06F21/121; G06F21/123; G06F9/00; G06F9/06; G06F9/30; G06F9/30145
Claims Analysis
Total Claims: 8
Claim 1
Independent Claim
104 words
A method for enciphering and deciphering instructions in a microcomputer, comprising the steps of: enciphering an instruction in accordance with at least two coding formats to obtain at least two types of instruction codes; storing said at least two types of instruction codes into a storage unit; reading said two types of instruction codes one by one from said storage unit; discriminating which type the read instruction code is by means of a discriminating means; and deciphering said read instruction code by one of said at least two decoders in accordance with a decoding format corresponding to the type of the read instruction code.
Claim 2
Independent Claim
104 words
A method for enciphering and deciphering instructions in a microcomputer, comprising the steps of: enciphering an instruction in accordance with at least two coding formats to obtain at least two types of instruction codes; storing said at least two types of instruction codes into a storage unit; reading said two types of instruction codes one by one from said storage unit; discriminating which type the read instruction code is by means of a discriminating means; and deciphering said read instruction code by one of said at least two decoders in accordance with a decoding format corresponding to the type of the read instruction code.
Claim 3
Dependent Claim
64 words
A method as set forth in claim 1, wherein said discriminating step comprises the steps of: generating a selecting signal from a part of address signals, said address signals being used for accessing said storage unit to read said instruction codes; and selecting, by using said selecting signal, said one of at least two decoders as a decoder for decoding said read instruction code.
Claim 4
Dependent Claim
82 words
A microcomputer adapted for receiving at least two types of instruction codes which are coded by different coding formats, said microcomputer comprising: a discriminating means for discriminating which type the instruction code is; at least two decoders, each of said decoders corresponding to one type of said instruction codes in a one-to-one correspondence; and a selecting means for supplying the instruction code to one of said decoders in response to the type of the read instruction code discriminated by said discriminating means.
Claim 5
Dependent Claim
82 words
A microcomputer adapted for receiving at least two types of instruction codes which are coded by different coding formats, said microcomputer comprising: a discriminating means for discriminating which type the instruction code is; at least two decoders, each of said decoders corresponding to one type of said instruction codes in a one-to-one correspondence; and a selecting means for supplying the instruction code to one of said decoders in response to the type of the read instruction code discriminated by said discriminating means.
Claim 6
Dependent Claim
50 words
A microcomputer as set forth in claim 3, wherein said discriminating means comprises a means for generating a selecting signal from a part of address signals, and said selecting means comprises a gate means, said selecting signal being supplied to said gate means to open or close said gate means.
Claim 7
Dependent Claim
38 words
A microcomputer as set forth in claim 3, wherein said at least two decoders are so wired as to decode different types of the read instruction codes in accordance with different types of decoding formats from each other.
Claim 8
Dependent Claim
27 words
A microcomputer as set forth in claim 5, wherein the decoded results from said at least two decoders coincide with instruction to be performed by said microcomputer.
References Cited (Backward Citations)
No citation records indexed.
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