Patent US5293526A successfully refreshed from Google Patents.
EP0083181A2
Expired / Lapsed
EP
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An integrated logic circuit
Assignee: Toshiba Corp
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Filing: 1982-12-17
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Granted: —
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Expires: 2002-12-17
Abstract
Abstract In an integrated logic circuit employing normally-off type FET's, it is difficult, but desirable to realize a NAND gate due to unwanted flow of the forward current to the next stage.In accordance with the invention, a stable NAND gate operation can be realized by introducing a NOR gate (30) into all gate electrodes (IN1) of the inputs of the NAND gate, except one gate electrode (IN2) thereof of which source is grounded.
Inventors
- 👤 Nobuyuki Toyoda
- 👤 Akimichi Hojo
Bibliographic Details
Application Number
—
Jurisdiction
EP
Data Source
google_patents
Last Synchronized
2026-11-02 20:55
CPC Classifications
H; H03; H03K; H03K19/00; H03K19/02; H03K19/08; H03K19/094; H03K19/09403; H03K19/09407; H03K19/0952
Claims Analysis
Total Claims: 8
Claim 1
Independent Claim
114 words
An integrated logic circuit comprising: a pair of power supply terminals (VDD, VSS) of which one terminal is grounded; ( N - 1) numbers of NOR gates (30) including first normally-off type field effect transistors (Q4, Q5), of which sources (S4, S5) are grounded, said N being any integer more than 1, and; a NAND gate having (N) numbers of second normally-off type field effect transistors (Ql, Q2), of which source-to-drain current paths are series-connected, at least one of all gate electrodes of said second field effect transistors being connected to the first input (IN2) of the NAND gate, and the remaining gate electrodes (IN1) thereof being connected to said respective NOR gate (30).
Claim 2
Dependent Claim
114 words
An integrated logic circuit comprising: a pair of power supply terminals (VDD, VSS) of which one terminal is grounded; ( N - 1) numbers of NOR gates (30) including first normally-off type field effect transistors (Q4, Q5), of which sources (S4, S5) are grounded, said N being any integer more than 1, and; a NAND gate having (N) numbers of second normally-off type field effect transistors (Ql, Q2), of which source-to-drain current paths are series-connected, at least one of all gate electrodes of said second field effect transistors being connected to the first input (IN2) of the NAND gate, and the remaining gate electrodes (IN1) thereof being connected to said respective NOR gate (30).
Claim 3
Dependent Claim
25 words
An integrated logic circuit as claimed in claim 1, wherein said first and second normally-off type field effect transistors are metal Schottky-barrier-gate field effect transistors.
Claim 4
Dependent Claim
25 words
An integrated logic circuit as claimed in claim 1, wherein said first and second normally-off type field effect transistors are junction gate field effect transistors.
Claim 5
Dependent Claim
102 words
An integrated logic circuit comprising: a pair of power supply terminals of which one terminal is grounded; (N - 1) numbers of NOR gates including first normally-off type field effect transistors, of which sources are grounded, said N being any integer more tnan 1, and; an AND/NOR gate having (N) numbers of second normally-off type field effect transistors, of wnicr source-to-drain current paths are series-connected, at least one of all gate electrodes of said second field effect transistors being connected to the first input of the AND/ NOR gate, and the remaining gate electrodes thereof being connected to said respective NOR gate.
Claim 6
Dependent Claim
102 words
An integrated logic circuit comprising: a pair of power supply terminals of which one terminal is grounded; (N - 1) numbers of NOR gates including first normally-off type field effect transistors, of which sources are grounded, said N being any integer more tnan 1, and; an AND/NOR gate having (N) numbers of second normally-off type field effect transistors, of wnicr source-to-drain current paths are series-connected, at least one of all gate electrodes of said second field effect transistors being connected to the first input of the AND/ NOR gate, and the remaining gate electrodes thereof being connected to said respective NOR gate.
Claim 7
Dependent Claim
25 words
An integrated logic circuit as claimed in claim 4, wherein said first and second normally-off type field effect transistors are metal Schottky-barrier-gate field effect transistors.
Claim 8
Dependent Claim
25 words
An integrated logic circuit as claimed in claim 4, wherein said first and second normally-off type field effect transistors are junction gate field effect transistors.
References Cited (Backward Citations)
No citation records indexed.
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