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EP0083020A2 Expired / Lapsed EP ⏱️ 0.0 years remaining

Process for making multilayer integrated circuit substrate

Assignee: International Business Machines Corp
•
Filing: 1982-12-14
•
Granted: —
•
Expires: 2002-12-14
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Abstract

Abstract A process is provided for making a multilayer integrated circuit substrate having improved via connection. A first layer M1 of chrome-copper-chrome (19-20-21) is applied to a ceramic substrate (18) and the circuits etched. A polyimide layer (22) is then applied, cured, and developed and etched to provide via holes in the polyimide down to the M1 circuitry. The top chrome (21) is now etched to expose the M1 copper (20) in the via holes. A second layer M2 of copper-chrome (23-24) is evaporated onto the polyimide (22) at a high substrate temperature to provide a copper interface at the base of the vias having no visible grain boundaries and a low resistance. M2 circuitization is then carried out.

Inventors

  • 👤 Krishna Kumar Nair
  • 👤 Keith Alan Snyder

Bibliographic Details

Application Number —
Jurisdiction EP
Data Source google_patents
Last Synchronized 2026-10-29 20:12
CPC Classifications
H; H10; H10W; H10W70/00; H10W70/01; H10W70/05; H05; H05K; H05K3/00; H05K3/46; H05K3/4644; H05K3/467; H10W70/60; H10W70/62; H10W70/66

Claims Analysis

Total Claims: 4
Claim 1
Independent Claim 119 words
A process for making a multilayer integrated circuit substrate having via connections by depositing a first metal layer (Ml) of chrome-copper-chrome (19-20-21) onto a ceramic substrate (18), - photoetching circuitry on said first metal layer, applying a layer (22) of polyimide; photoetching via holes in the polyimide down to said circuitry; etching the top layer (21) of chrome in said first metal layer (Ml) to expose copper (20) in said via holes, said process being characterized by evaporating a second metal layer (M2) of copper-chrome (23-24) at a high temperature of said substrate to form a copper interface at the base of said via holes which has a low resistance and photoetching circuitry on said second metal layer (M2).
Claim 2
Dependent Claim 119 words
A process for making a multilayer integrated circuit substrate having via connections by depositing a first metal layer (Ml) of chrome-copper-chrome (19-20-21) onto a ceramic substrate (18), - photoetching circuitry on said first metal layer, applying a layer (22) of polyimide; photoetching via holes in the polyimide down to said circuitry; etching the top layer (21) of chrome in said first metal layer (Ml) to expose copper (20) in said via holes, said process being characterized by evaporating a second metal layer (M2) of copper-chrome (23-24) at a high temperature of said substrate to form a copper interface at the base of said via holes which has a low resistance and photoetching circuitry on said second metal layer (M2).
Claim 3
Dependent Claim 51 words
Process according to claim 1, characterized in that the second metal layer (M2) of copper-chrome (23-24) is evaporated at a temperature of said substrate of 360-380°C to form an interface of said copper layers (20-23) at the base of said via holes which provides.a via resistance of less than 1 milliohm.
Claim 4
Dependent Claim 53 words
Process according to claims 1 or 2, characterized in that after photoetching via holes in the polyimide this material is "C" cured at 360°C in the presence of nitrogen, so that the copper (23) of the second evaporated- metal layer (M2) adheres to the polyimide (22) with a pull strength of 136-272 bar.

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