EP0078725A2
Expired / Lapsed
EP
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Method for forming submicron bipolar transistors without epitaxial growth and the resulting structure
Assignee: Fairchild Semiconductor Corp
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Filing: 1982-10-19
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Granted: —
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Expires: 2002-10-19
Abstract
Abstract A vertical bipolar transistor is fabricated in a semiconductor substrate without an epitaxial layer using oxide isolation and ion implantation techniques. ion implantation energies in the KEV ranges are used to implant selected ions into the substrate to form a collector region and buried collector layer less than 1 micron from the surface of the device, and then to form a base region of opposite conductivity type in the collector layer and an emitter region of the first conductivity type in the base region. Even though ion implantation techniques are used to form all regions, the base and the emitter regions can, if desired, be formed to abut the field oxide used to laterally define the islands of semiconductor material. The field oxide is formed to a thickness of less than 1 micron and typically to a thickness of approximately 0.4 microns, thereby substantially reducing the lateral oxidation of the semiconductor silicon islands and making possible devices of extremely small size, typically around 16-18 square microns. During the implantation of channel stop regions between the islands of semiconductor material a thin oxide layer is used to screen the underlying silicon from forming oxidation-induced stacking faults by the subsequent high dose field implantation and oxidation. A nitrogen anneal following this implantation and prior to forming the field oxide further reduces the frequency of stacking faults.
Inventors
- 👤 Wen-Chuang Ko
Bibliographic Details
Application Number
—
Jurisdiction
EP
Data Source
google_patents
Last Synchronized
2026-10-27 23:26
CPC Classifications
H; H10; H10D; H10D10/00; H10D10/40; H10D10/441; H10W; H10W10/00; H10W10/01; H10W10/011; H10W10/012; H10W10/0121; H10W10/0124; H10W10/0125; H10W10/0126; H10W10/10; H10W10/13
Claims Analysis
Total Claims: 25
Claim 1
Independent Claim
306 words
A process of forming a semiconductor structure in a substrate- of a first conductivity type characterized by: forming a first region of opposite conductivity type in said substrate by ion implanting a selected impurity into said substrate, said first region of opposite conductivity type extending from the surface of said substrate to a selected depth into said substrate; forming grooves in said substrate to leave in said substrate islands of semiconductor material in which active regions are to be formed separated by grooves formed to a selected depth in said substrate; ion implanting a selected impurity into the grooves to thereby form second regions of said first conductivity type in said substrate and thereby to electrically isolate said first region of opposite conductivity type in each of said islands from portions of said first region in the other islands; annealing said wafer following the implantation of said second regions; oxidizing said wafer to form an oxide layer over said grooves to a thickness no greater than approximately one micron, thereby to minimize the lateral encroachment of said oxide on each of said islands of semiconductor material; forming a base region of said first conductivity type in said first region by implanting ions of said first conductivity type in said first region; forming an emitter region in said base region by ion implanting an impurity of said second conductivity type into said base region, said emitter region extending into said base region a selected distance less than the depth of base region extending into said first region; forming a collector contact to that portion of said first region in which the base region is not formed; forming insulation over the top surface of each of said islands of semiconductor material; and forming contacts to selected portions of said emitter region; said base region and said first region.
Claim 2
Dependent Claim
306 words
A process of forming a semiconductor structure in a substrate- of a first conductivity type characterized by: forming a first region of opposite conductivity type in said substrate by ion implanting a selected impurity into said substrate, said first region of opposite conductivity type extending from the surface of said substrate to a selected depth into said substrate; forming grooves in said substrate to leave in said substrate islands of semiconductor material in which active regions are to be formed separated by grooves formed to a selected depth in said substrate; ion implanting a selected impurity into the grooves to thereby form second regions of said first conductivity type in said substrate and thereby to electrically isolate said first region of opposite conductivity type in each of said islands from portions of said first region in the other islands; annealing said wafer following the implantation of said second regions; oxidizing said wafer to form an oxide layer over said grooves to a thickness no greater than approximately one micron, thereby to minimize the lateral encroachment of said oxide on each of said islands of semiconductor material; forming a base region of said first conductivity type in said first region by implanting ions of said first conductivity type in said first region; forming an emitter region in said base region by ion implanting an impurity of said second conductivity type into said base region, said emitter region extending into said base region a selected distance less than the depth of base region extending into said first region; forming a collector contact to that portion of said first region in which the base region is not formed; forming insulation over the top surface of each of said islands of semiconductor material; and forming contacts to selected portions of said emitter region; said base region and said first region.
Claim 3
Dependent Claim
60 words
The method of Claim 1 characterized by the step of forming a layer of dielectric of selected thickness over the grooves formed in said silicon prior to the implantation of said impurity in said grooves to form second regions of said first conductivity type, thereby to prevent said implantation of said impurity from damaging the semiconductor material underlying said dielectric.
Claim 4
Dependent Claim
37 words
The method of Claim 1 or 2 characterized in that said first region is formed to a depth such that the peak concentration of said first region is approximately 0.5 microns beneath the surface of said substrate.
Claim 5
Dependent Claim
42 words
The method of Claim 1, 2 or 3 characterized in that the base region is formed in said first region such that the base-collector junction cf the to-be-formed device in said island is approximately 0.4 microns beneath the surface of said island.
Claim 6
Dependent Claim
37 words
The method of Claim 1, 2, 3 or 4 characterized in that the emitter region is formed in said base region such that the emitter-base junction is approximately 0.2 microns beneath the surface of said to-be-formed island.
Claim 7
Independent Claim
38 words
The method of any previous claim characterized in that the step of annealing said wafer following the implantation of said second regions comprises annealing said wafer in a nitrogen atmosphere for a selected time at a selected temperature.
Claim 8
Independent Claim
78 words
The method of any previous claim characterized in that the step of ion implanting a selected impurity into the grooves to thereby form second regions of said first conductivity type in said substrate comprises ion implanting a dopant of said first conductivity type to form P type regions to a concentration sufficient to break up said first region of opposite conductivity type formed in said substrate into a plurality of first regions, each electrically isolated from the other.
Claim 9
Dependent Claim
28 words
The method of Claim 7 characterized in that said concentration is at least 2x10 18 atoms/cm 3 and said implantation energy is on the order of 50 KEV.
Claim 10
Independent Claim
65 words
The method of any one of claims 1-8 characterized in that the step of forming a first region of opposite conductivity type in said substrate by ion implanting a selected impurity into said substrate comprises implanting phosphorous ions into said substrate using about 200 KEV P ++ phosphorous ions to achieve a dosage of about 1x10 14 cm -2 to 3x10 14 cm -2 .
Claim 11
Independent Claim
84 words
The method of any previous claim characterized in that the ion implanting of said phosphorous ions into said substrate results in the 0 formation of an N+ region having a peak concentration about 5,000A below the surface of the substrate and in the formation of an N region between said N+ region and the surface of the substrate and wherein said N+ region and said N regi.on together comprise both the buried layer and the collector region of at least one to-be-formed bipolar transistor.
Claim 12
Independent Claim
27 words
The method of any previous claim characterized in that said semiconductor material comprises silicon and said layer of dielectric of selected thickness comprises an oxide of silicon.
Claim 13
Dependent Claim
25 words
The method of Claim 11 characterized in that said oxide of silicon comprises silicon dioxide formed by thermally oxidizing the surface of said silicon material.
Claim 14
Dependent Claim
27 words
The method of Claim 12 characterized in that said thermally grown silicon oxide comprises a layer of silicon oxide formed to a thickness 0 of between 200-300A.
Claim 15
Dependent Claim
18 words
The method of Claim 13 characterized in that said silicon oxide 0 has a thickness of about 270A.
Claim 16
Independent Claim
68 words
A method of implanting an impurity into semiconductor material which is characterized by: forming a protective layer of material over the portions of said semiconductor material in which ions are to be implanted, said protective material being of such a thickness as to allow ions to be implanted in the underlying semiconductor material through said protective material; and implanting ions into said semiconductor material beneath said protective layer.
Claim 17
Independent Claim
68 words
A method of implanting an impurity into semiconductor material which is characterized by: forming a protective layer of material over the portions of said semiconductor material in which ions are to be implanted, said protective material being of such a thickness as to allow ions to be implanted in the underlying semiconductor material through said protective material; and implanting ions into said semiconductor material beneath said protective layer.
Claim 18
Dependent Claim
17 words
The method of Claim 15 characterized by the step of annealing said semiconductor material following ion implantation.
Claim 19
Dependent Claim
29 words
The method of Claim 16 characterized in that the semiconductor material comprises silicon, the protective layer comprises an oxide of silicon and the annealing is carried out in nitrogen.
Claim 20
Dependent Claim
24 words
The product made by the process of Claims 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 15, 16 or 17.
Claim 21
Dependent Claim
159 words
A semiconductor structure characterized by: a silicon substrate of first conductivity type having a top surface; field oxide regions formed by thermally-oxiding portions of the silicon substrate in the field of the device; a plurality of islands of silicon material formed in said substrate, each island being separated from adjacent islands by selected ones of said field oxide regions; a first region of opposite conductivity type to said first conductivity type formed in each of said islands, each said first region extending across a corresponding one of said islands and being laterally bounded by said field oxide, wherein the peak impurity concentration in each said first region is formed within 1 micron of said surface; a second region of first conductivity type formed within selected ones of said first regions; a third region of opposite conductivity type formed in selected ones of said second regions; wherein each of said first, second and third regions is formed by ion implantation.
Claim 22
Dependent Claim
159 words
A semiconductor structure characterized by: a silicon substrate of first conductivity type having a top surface; field oxide regions formed by thermally-oxiding portions of the silicon substrate in the field of the device; a plurality of islands of silicon material formed in said substrate, each island being separated from adjacent islands by selected ones of said field oxide regions; a first region of opposite conductivity type to said first conductivity type formed in each of said islands, each said first region extending across a corresponding one of said islands and being laterally bounded by said field oxide, wherein the peak impurity concentration in each said first region is formed within 1 micron of said surface; a second region of first conductivity type formed within selected ones of said first regions; a third region of opposite conductivity type formed in selected ones of said second regions; wherein each of said first, second and third regions is formed by ion implantation.
Claim 23
Dependent Claim
68 words
The structure of Claim 19 characterized by channel stop regions formed beneath the field oxide regions in said structure, said channel stop regions being of the same conductivity type but of a higher impurity concentration than the substrate and said channel stop regions serving, together with said field oxide regions, to dielectrically isolate each of said plurality of islands of silicon material from the other islands of silicon.
Claim 24
Dependent Claim
81 words
The structure of Claim 19 or 20 characterized in that selected ones of said second regions formed in said first regions are formed so as to abut corresponding portions of the field oxide laterally surrounding the silicon islands in which said second regions are formed; and selected ones of said third regions formed in said second regions are formed to abut corresponding portions of the field oxide laterally surrounding the islands of silicon material in which said third regions are formed.
Claim 25
Dependent Claim
39 words
The structure of Claim 19, 20 or 21 characterized in that said field oxide is formed to a thickness of less than one (1) micron to minimize the lateral encroachment of the field oxide on the adjacent silicon islands.
References Cited (Backward Citations)
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