Transistor-like semiconductor device and method of producing the same

Claim 1

A semiconductor device comprising a first insulating film (17) which is formed in a surface region of a semiconductor substrate (12) and which has a plurality of openings; an emitter (15), a base (14) and a collector (13) which are formed in avdesired one of said openings of said first insulating film; a polycrystalline silicon film (18) which is formed on a desired area of said first insulating film in contact with a side part of said base; a collector electrode (10") which is connected to said semiconductor substrate in another of said openings of said first insulating film; a second insulating film (19) which is deposited on said polycrystalline silicon film and on the first insulating film near to said polycrystalline silicon film and which has a plurality of openings; a base electrode (10') which is connected to said polycrystalline silicon film in a desired one of said openings of said second insulating film; and an emitter electrode (10) which is connected to said emitter in another of said openings of said second insulating film; a semiconductor layer of low resistance being interposed between said collector electrode and said semiconductor substrate (12); a third insulating film (110) being formed on an exposed surface of said first insulating film (17). (Fig. 2).

Claim 12

A method for procuding a semiconductor device characterized by following consecutive steps: a) forming an n +- type burried layer (12) on a p-type Si-substrate (11); b) forming an epitaxial Si-layer (13) upon the n +- type layer (12); c) forming and stacking an Sio 2 film (101), and Si 3 N 4 film (102) and an SiO 2 film (103) on the whole surface; d) etching and removing those parts of the deposited SiO 2 fiim (101), Si 3 N 4 film (102) and SiO 2 film (103) which do not overlie parts for forming the active region and collector lead-out region of a vertical transistor; e) etching and removing the exposed parts of the epitaxial Si-layer (13) by employing the three layers of the insulating films (101, 102 and 103) as a mask; f) side-etching those parts of the epitaxial Si layer (13) underlying the three-layer insulating films (101, 102, 103) to form structures in which the three-layer insulating films (101, 102,103) overhang; g) forming an SiO 2 film (104 on the upper surface of the epitaxial Si-layer (13) and on the surfaces of the overhang structure parts thereof; h) forming and stucking on the SiO 2 -film (104) an Si 3 N 4 -filmf105); i) etching and removing those parts of the Si 3 N 4 -film (105) other than the side surfaces of the three-layer insulating films (101, 102, 103) and the parts of the epitaxial Si layer (13) underlying these insulating films; j) etching and removing the exposed parts of the Si0 2 - film (104) on the parts of the epitaxial Si-layer (13) underlying the insulating films (102, 102, 103); k) forming a thick SiO 2 -film (17); 1) etching and removing the SiO 2 -layer (104) and the Si3N4 film (105); m) deposing a polycrystalline silicon film (18) on the whole area; n) removing those parts of the silicon film (18) which are deposited on the remaining parts of the SiO 2 -film (103); o) stacking and deposing an SiO 2 -film (104) and an Si3N4- film on the whole area; p) performing etching so, that parts of the-SiO 2 -film (104) and the Si 3 N 4 -film (105) deposited on regions to form an emitter electrode and a base lead-out electrode therein are left behind, whereas the parts deposited on the other regions are removed; r) oxidizing the exposed parts of the polycrystalline silicon film (18) and forming an SiO 2 -film (110); s) successively etching and removing the Si0 2 -film (103), Si 3 N 4 -film (102) and Si0 2 -film (101) which are deposited on the part to form the collector lead-out electrode therein; t) doping heavily the exposed epitaxial Si-layer (13) with an impurity so as to form the collector lead-out semiconductor layer (111) of low resistance, whereby the films (104, 105) are used as a mask; u) removing the Si0 2 -film (104) and the Si 3 N 4 -film (105) performing the mask in step (t) to expose the upper surface of the polycrytalline silicon film (18); v) introducing a p-type impurity into the exposed part of the polycrystalline silicon film (18) to turn the part into a low resistance; w) oxidizing the surface of the polycrystalline silicon film (18) to form an Si0 2 -film (19); x) etching and removing the SiO 2 film (103), Si 3 N 4 -film (102) and SiO 2 -film (101) deposited on the epitaxial Si-layer (13); y) forming a base (14) and an emitter (15)of a to built transistor; z) etching desired parts of the Si0 2 film (19) to form contact windows; zz) forming the emitter electrode (10),base electrode (10') and collector electrode (10"). (Fig. 3a Fig. 3d)

Claim 13

A method for procuding a semiconductor device characterized by following consecutive steps: a) forming an n +- type burried layer (12) on a p-type Si-substrate (11); b) forming an epitaxial Si-layer (13) upon the n +- type layer (12); c) forming and stacking an Sio 2 film (101), and Si 3 N 4 film (102) and an SiO 2 film (103) on the whole surface; d) etching and removing those parts of the deposited SiO 2 fiim (101), Si 3 N 4 film (102) and SiO 2 film (103) which do not overlie parts for forming the active region and collector lead-out region of a vertical transistor; e) etching and removing the exposed parts of the epitaxial Si-layer (13) by employing the three layers of the insulating films (101, 102 and 103) as a mask; f) side-etching those parts of the epitaxial Si layer (13) underlying the three-layer insulating films (101, 102, 103) to form structures in which the three-layer insulating films (101, 102,103) overhang; g) forming an SiO 2 film (104 on the upper surface of the epitaxial Si-layer (13) and on the surfaces of the overhang structure parts thereof; h) forming and stucking on the SiO 2 -film (104) an Si 3 N 4 -filmf105); i) etching and removing those parts of the Si 3 N 4 -film (105) other than the side surfaces of the three-layer insulating films (101, 102, 103) and the parts of the epitaxial Si layer (13) underlying these insulating films; j) etching and removing the exposed parts of the Si0 2 - film (104) on the parts of the epitaxial Si-layer (13) underlying the insulating films (102, 102, 103); k) forming a thick SiO 2 -film (17); 1) etching and removing the SiO 2 -layer (104) and the Si3N4 film (105); m) deposing a polycrystalline silicon film (18) on the whole area; n) removing those parts of the silicon film (18) which are deposited on the remaining parts of the SiO 2 -film (103); o) stacking and deposing an SiO 2 -film (104) and an Si3N4- film on the whole area; p) performing etching so, that parts of the-SiO 2 -film (104) and the Si 3 N 4 -film (105) deposited on regions to form an emitter electrode and a base lead-out electrode therein are left behind, whereas the parts deposited on the other regions are removed; r) oxidizing the exposed parts of the polycrystalline silicon film (18) and forming an SiO 2 -film (110); s) successively etching and removing the Si0 2 -film (103), Si 3 N 4 -film (102) and Si0 2 -film (101) which are deposited on the part to form the collector lead-out electrode therein; t) doping heavily the exposed epitaxial Si-layer (13) with an impurity so as to form the collector lead-out semiconductor layer (111) of low resistance, whereby the films (104, 105) are used as a mask; u) removing the Si0 2 -film (104) and the Si 3 N 4 -film (105) performing the mask in step (t) to expose the upper surface of the polycrytalline silicon film (18); v) introducing a p-type impurity into the exposed part of the polycrystalline silicon film (18) to turn the part into a low resistance; w) oxidizing the surface of the polycrystalline silicon film (18) to form an Si0 2 -film (19); x) etching and removing the SiO 2 film (103), Si 3 N 4 -film (102) and SiO 2 -film (101) deposited on the epitaxial Si-layer (13); y) forming a base (14) and an emitter (15)of a to built transistor; z) etching desired parts of the Si0 2 film (19) to form contact windows; zz) forming the emitter electrode (10),base electrode (10') and collector electrode (10"). (Fig. 3a Fig. 3d)