EP0074303B1
Expired / Lapsed
EP
⏱️ 0.0 years remaining
Outline of a multilayer circuit board and method of making multilayer circuits using it
Assignee: Individual
•
Filing: 1982-08-23
•
Granted: 1986-02-26
•
Expires: 2002-08-23
Abstract
No abstract record available.
Inventors
- 👤 François Rouge
Bibliographic Details
Application Number
—
Jurisdiction
EP
Data Source
google_patents
Last Synchronized
2026-11-08 14:25
CPC Classifications
H; H05; H05K; H05K1/00; H05K1/02; H05K1/0286; H05K1/0287; H05K1/0296; H05K1/0298; H05K2201/00; H05K2201/09; H05K2201/09209; H05K2201/095; H05K2201/09609; H05K2201/09818; H05K2201/09945; H05K3/00; H05K3/40; H05K3/42; H05K3/429
Claims Analysis
Total Claims: 9
Claim 1
Independent Claim
219 words
A blank for a multi-layer electrical circuit board, comprising an electrically insulating flat substrate having at least one inner layer (5, 6) parallel to the faces of the substrate and having an electrically conductive network formed by the repetition of a predetermined elementary pattern in two directions, characterized in that said repetition occurs through rectilinear movement, with a pitch (2p) along two orthogonal directions, of a pattern consisting of four square areas whose diagonals are parallel to said orthogonal directions, the angles of each square area being truncated perpendicularly to the diagonal thereof and at a same distance from the center, the truncations of said square areas being in coincidence and their centers constituting the apices of a square having a side length equal to the half pitch (p) of the rectilinear movement, one of the fou ' truncated square areas constituting a nonconducting site (3) without the three others have a plating formed with a central opening (4) also forming a non-conducting site, the distance between said truncations and the centers of the square areas being such that said square areas enclose a non-conducting square site (2) whose dimensions, as well as the dimensions of the central openings (4) are sufficient for rendering it possible to form a connection plated hole while creating a junction with the network.
Claim 2
Dependent Claim
219 words
A blank for a multi-layer electrical circuit board, comprising an electrically insulating flat substrate having at least one inner layer (5, 6) parallel to the faces of the substrate and having an electrically conductive network formed by the repetition of a predetermined elementary pattern in two directions, characterized in that said repetition occurs through rectilinear movement, with a pitch (2p) along two orthogonal directions, of a pattern consisting of four square areas whose diagonals are parallel to said orthogonal directions, the angles of each square area being truncated perpendicularly to the diagonal thereof and at a same distance from the center, the truncations of said square areas being in coincidence and their centers constituting the apices of a square having a side length equal to the half pitch (p) of the rectilinear movement, one of the fou ' truncated square areas constituting a nonconducting site (3) without the three others have a plating formed with a central opening (4) also forming a non-conducting site, the distance between said truncations and the centers of the square areas being such that said square areas enclose a non-conducting square site (2) whose dimensions, as well as the dimensions of the central openings (4) are sufficient for rendering it possible to form a connection plated hole while creating a junction with the network.
Claim 3
Dependent Claim
253 words
A blank for a multi-layer electrical circuit board, comprising an electrically insulating flat substrate having at least one inner layer (5, 6) parallel to the faces of the substrate and having an electrically conductive network formed by the repetition of a predetermined elementary pattern in two directions, characterized in that said repetition occurs through reactilinear movement, with a pitch (2p) along two orthogonal directions, of a pattern consisting of four square areas whose diagonals are parallel to said orthogonal directions, the angles of each square area being truncated perpendicularly to the diagonal thereof and at a same distance from the center, the centers of the square areas being appices of an other square having a side dimensions equal to the half pitch (p) of the rectilinear movement, one of the four square areas of the pattern constituting a non-conducting site (3) while the three others have a plating, two square areas which have a plating and which are deducted from each other by a rectilinear movement of amplitude (p) along one of said orthogonal directions being connected by a metalplated zone elongated in a direction parallel to the direction of said rectilinear movement, the size of the square areas of the pattern and the width of the elongated zones being such that said square areas enclose an other non-conducting square site (2) whose dimensions, as well as the dimensions of the non-conducting site (3) are sufficient for rendering it possible to form a connection metal-plated hole without creating a junction with the network.
Claim 4
Dependent Claim
253 words
A blank for a multi-layer electrical circuit board, comprising an electrically insulating flat substrate having at least one inner layer (5, 6) parallel to the faces of the substrate and having an electrically conductive network formed by the repetition of a predetermined elementary pattern in two directions, characterized in that said repetition occurs through reactilinear movement, with a pitch (2p) along two orthogonal directions, of a pattern consisting of four square areas whose diagonals are parallel to said orthogonal directions, the angles of each square area being truncated perpendicularly to the diagonal thereof and at a same distance from the center, the centers of the square areas being appices of an other square having a side dimensions equal to the half pitch (p) of the rectilinear movement, one of the four square areas of the pattern constituting a non-conducting site (3) while the three others have a plating, two square areas which have a plating and which are deducted from each other by a rectilinear movement of amplitude (p) along one of said orthogonal directions being connected by a metalplated zone elongated in a direction parallel to the direction of said rectilinear movement, the size of the square areas of the pattern and the width of the elongated zones being such that said square areas enclose an other non-conducting square site (2) whose dimensions, as well as the dimensions of the non-conducting site (3) are sufficient for rendering it possible to form a connection metal-plated hole without creating a junction with the network.
Claim 5
Dependent Claim
32 words
A blank according to claim 1 or 2, characterized in that it comprises two inner layers (5, 6) whose grids are off-set by p alonq one of the directions of the network.
Claim 6
Dependent Claim
27 words
A blank according to claim 2, characterized in that one of said inner layers constitutes a ground plane and the other one constitutes a power supply plane.
Claim 7
Dependent Claim
47 words
A process for manufacturing double face multi-layer electrical circuit boards from a blank according to any one of claims 1-4, characterized in that connections between the faces and an inner layer are made by drilling a hole at one of said other sites and plating the hole.
Claim 8
Dependent Claim
60 words
A process according to claim 5, characterized in that, said blank having two inner layers which are off-set with respect to each other by p along one of the directions of the network, the hole is drilled in one of said other sites of the layer to be connected which is above a non-conducting site (3) of the other layer.
Claim 9
Dependent Claim
53 words
A process according to claim 5 or 6, characterized in that the connection between a component carried by a face and a plated hole for connection with a layer is made by a metal path formed between a site of said first grid and a site of the second grid on said face.
References Cited (Backward Citations)
No citation records indexed.
USPTO Annuity & Maintenance Windows
Maintenance schedule is calculated for granted US utility patents.