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EP0073487A2 Expired / Lapsed EP ⏱️ 0.0 years remaining

Method for manufacturing three-dimensional semiconductor device

Assignee: Toshiba Corp
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Filing: 1982-08-26
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Granted: —
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Expires: 2002-08-26
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Abstract

Abstract A method for manufacturing a three-dimensional semiconductor device which is capable of preventing the stepwise disconnection of an interconnection layer and performing a high integration thereby and which comprises the steps of: forming a polycrystalline or amorphous semiconductor layer on an insulating film having an opening at a predetermined position of a first element covered on a single-crystalline semiconductor substrate having the first element; irradiating an energy beam to said semiconductor layer to grow a single crystal in a predetermined region in said semiconductor layer using as a seed crystal that part of the semiconductor substrate which contacts with semiconductor layer; and forming a second element on the grown single-crystalline semiconductor region and forming an interconnection between the first and second elements by using a part of the single-crystalline semiconductor region from said semiconductor substrate to said second element.

Inventors

  • 👤 Tomoyasu Inoue
  • 👤 Kenji Shibata

Bibliographic Details

Application Number —
Jurisdiction EP
Data Source google_patents
Last Synchronized 2026-11-04 22:58
CPC Classifications
H; H10; H10P; H10P14/00; H10P14/20; H10P14/32; H10P14/3202; H10P14/3238; H10D; H10D30/00; H10D30/60; H10D30/67; H10D30/6704; H10D30/6713; H10D30/674; H10D30/6741; H10D30/6743; H10D30/6744; H10D84/00; H10D84/01; H10D84/02; H10D84/03; H10D84/038; H10D88/00; H10D88/01; H10P14/29; H10P14/2901; H10P14/2902; H10P14/2905; H10P14/34; H10P14/3402; H10P14/3404; H10P14/3411; H10P14/3451; H10P14/3452; H10P14/3458; H10P14/38; H10P14/3802; H10P14/3808; H10P14/3818; H10P14/382; H10W; H10W20/00; H10W20/01; H10W20/021; H10W20/40; H10W20/41; H10W20/435

Claims Analysis

Total Claims: 10
Claim 1
Independent Claim 136 words
A method for manufacturing a three-dimensional semiconductor device comprising the steps of: forming a polycrystalline or amorphous semiconductor layer (3) on an insulating film (2) having an opening at a predetermined position of a first element (Tl) covered on a single-crystalline semiconductor substrate (1) having the first element (Tl); irradiating an energy beam to said semiconductor layer (3) to grow a single crystal in a predetermined region in said semiconductor layer (3) using as a seed crystal that part of the semiconductor substrate (1) which contacts with said semiconductor layer (3); and forming a second element (T2) on the grown single-crystalline semiconductor region (3') and forming an interconnection between the first and second elements (Tl, T2) by using a part of the single-crystalline semiconductor region (3') from said semiconductor substrate (1) to said second element (T2).
Claim 2
Independent Claim 136 words
A method for manufacturing a three-dimensional semiconductor device comprising the steps of: forming a polycrystalline or amorphous semiconductor layer (3) on an insulating film (2) having an opening at a predetermined position of a first element (Tl) covered on a single-crystalline semiconductor substrate (1) having the first element (Tl); irradiating an energy beam to said semiconductor layer (3) to grow a single crystal in a predetermined region in said semiconductor layer (3) using as a seed crystal that part of the semiconductor substrate (1) which contacts with said semiconductor layer (3); and forming a second element (T2) on the grown single-crystalline semiconductor region (3') and forming an interconnection between the first and second elements (Tl, T2) by using a part of the single-crystalline semiconductor region (3') from said semiconductor substrate (1) to said second element (T2).
Claim 3
Dependent Claim 125 words
The method according to claim 1, wherein said semiconductor substrate (1) comprises a third element (T3), an opening is formed at a predetermined position of said insulating film on the third element, and said method further comprising the steps of: forming other insulating film on said single-crystalline semiconductor region, forming other polycrystalline or amorphous semiconductor on a region from said third element to the second element covered with said other insulating film, and irradiating an energy beam to said other semiconductor layer to thereby grow a single crystal in a predetermined region in said other semiconductor layer using as a seed crystal that part of said semiconductor substrate which contacts with said other semiconductor layer, thereby forming an interconnection between said second and third elements.
Claim 4
Independent Claim 250 words
A method for manufacturing a three-dimensional semiconductor device comprising the steps of: forming a first polycrystalline or amorphous semiconductor layer on a part of a first element side on a first insulating film having openings at predetermined positions of first and second elements covered on a single-crystalline semiconductor substrate having the first and second elements; irradiating an energy beam to said first semiconductor layer to grow a single crystal in a predetermined region in said first semiconductor layer using as a seed crystal that part of said semiconductor substrate which contacts with the first semiconductor layer and to form a first single-crystalline semiconductor region; forming a second insulating film having a predetermined opening on a region from the second element side of said first insulating film to the first single-crystalline semiconductor region; forming a second polycrystalline or amorphous semiconductor layer from the second element side of said first insulating film to said second insulating film; irradiating an energy beam to said second semiconductor layer to grow a single crystal at a predetermined region in said second semiconductor layer using as a seed crystal that part of said semiconductor substrate which contacts with the second semiconductor layer; and forming a third element with said first single-crystalline semiconductor region as an interconnection between said first and second elements on the grown second single-crystalline semiconductor region and forming an interconnection between said second and third elements with a part of the second single-crystalline semiconductor region from said second element to said third element.
Claim 5
Independent Claim 250 words
A method for manufacturing a three-dimensional semiconductor device comprising the steps of: forming a first polycrystalline or amorphous semiconductor layer on a part of a first element side on a first insulating film having openings at predetermined positions of first and second elements covered on a single-crystalline semiconductor substrate having the first and second elements; irradiating an energy beam to said first semiconductor layer to grow a single crystal in a predetermined region in said first semiconductor layer using as a seed crystal that part of said semiconductor substrate which contacts with the first semiconductor layer and to form a first single-crystalline semiconductor region; forming a second insulating film having a predetermined opening on a region from the second element side of said first insulating film to the first single-crystalline semiconductor region; forming a second polycrystalline or amorphous semiconductor layer from the second element side of said first insulating film to said second insulating film; irradiating an energy beam to said second semiconductor layer to grow a single crystal at a predetermined region in said second semiconductor layer using as a seed crystal that part of said semiconductor substrate which contacts with the second semiconductor layer; and forming a third element with said first single-crystalline semiconductor region as an interconnection between said first and second elements on the grown second single-crystalline semiconductor region and forming an interconnection between said second and third elements with a part of the second single-crystalline semiconductor region from said second element to said third element.
Claim 6
Independent Claim 31 words
The method acccording to any of claims 1 to 3, wherein said energy beam is selected from the group consisting of an electron beam, a laser beam and an ion beam.
Claim 7
Independent Claim 17 words
The method according to any of claims 1 to 3, wherein said element is a MOS transistor.
Claim 8
Independent Claim 16 words
The method according to any of claims 1 to 3, wherein said element is a MESFET.
Claim 9
Independent Claim 26 words
The method according to any of claims 1 to 3, further comprising the step of doping an impurity in the single-crystalline semiconductor region forming said interconnection.
Claim 10
Independent Claim 36 words
The method according to any of claims 1 to 3, wherein said insulating film is selected from the group consisting of an SiO 2 , an SiN, an Aℓ,203 and an SiN-SiO 2 two layer structure.

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